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Searched refs:Timer (Results 1 – 25 of 53) sorted by relevance

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/linux/drivers/counter/
H A DKconfig14 Interval Timer (PIT). The Intel 825x family of chips was first
50 tristate "Flex Timer Module Quadrature decoder driver"
54 Select this option to enable the Flex Timer Quadrature decoder
82 tristate "Microchip Timer Counter Capture driver"
87 Select this option to enable the Microchip Timer Counter Block
105 tristate "STM32 LP Timer encoder counter driver"
108 Select this option to enable STM32 Low-Power Timer quadrature encoder
115 tristate "STM32 Timer encoder counter driver"
118 Select this option to enable STM32 Timer quadrature encoder
/linux/arch/powerpc/boot/dts/
H A Dlite5200.dts62 timer@600 { // General Purpose Timer
69 timer@610 { // General Purpose Timer
75 timer@620 { // General Purpose Timer
81 timer@630 { // General Purpose Timer
87 timer@640 { // General Purpose Timer
93 timer@650 { // General Purpose Timer
99 timer@660 { // General Purpose Timer
105 timer@670 { // General Purpose Timer
H A Dmpc5200b.dtsi63 gpt0: timer@600 { // General Purpose Timer
71 gpt1: timer@610 { // General Purpose Timer
78 gpt2: timer@620 { // General Purpose Timer
85 gpt3: timer@630 { // General Purpose Timer
92 gpt4: timer@640 { // General Purpose Timer
99 gpt5: timer@650 { // General Purpose Timer
106 gpt6: timer@660 { // General Purpose Timer
113 gpt7: timer@670 { // General Purpose Timer
H A Dtqm5200.dts62 timer@600 { // General Purpose Timer
H A Dmucmc52.dts12 /* Timer pins that need to be in GPIO mode */
H A Dcharon.dts65 timer@600 { // General Purpose Timer
/linux/Documentation/arch/mips/
H A Dingenic-tcu.rst4 Ingenic JZ47xx SoCs Timer/Counter Unit hardware
7 The Timer/Counter Unit (TCU) in Ingenic JZ47xx SoCs is a multi-function
14 - JZ4725B introduced a separate channel, called Operating System Timer
/linux/Documentation/timers/
H A Dhpet.rst2 High Precision Event Timer Driver for Linux
5 The High Precision Event Timer (HPET) hardware follows a specification
/linux/Documentation/translations/zh_TW/arch/loongarch/
H A Dirq-chip-model.rst31 | IPI | --> | CPUINTC | <-- | Timer |
67 | IPI | --> | CPUINTC | <-- | Timer |
/linux/Documentation/devicetree/bindings/x86/
H A Dtimer.txt4 * High Precision Event Timer (HPET)
/linux/arch/mips/loongson64/
H A DKconfig5 bool "RS780/SBX00 HPET Timer"
/linux/drivers/net/fddi/skfp/h/
H A Dfddimib.h23 typedef u_long Timer ; typedef
242 Timer fddiPATHT_Rmode ;
/linux/Documentation/watchdog/
H A Dwatchdog-pm.rst2 The Linux WatchDog Timer Power Management Guide
/linux/Documentation/virt/kvm/x86/
H A Dtimekeeping.rst139 0000 - Latch Timer 0 count for port 0x40
144 0001 - Set Timer 0 LSB mode for port 0x40
148 0010 - Set Timer 0 MSB mode for port 0x40
152 0011 - Set Timer 0 16-bit mode for port 0x40
156 0100 - Latch Timer 1 count for port 0x41 - as described above
157 0101 - Set Timer 1 LSB mode for port 0x41 - as described above
158 0110 - Set Timer 1 MSB mode for port 0x41 - as described above
159 0111 - Set Timer 1 16-bit mode for port 0x41 - as described above
161 1000 - Latch Timer 2 count for port 0x42 - as described above
162 1001 - Set Timer 2 LSB mode for port 0x42 - as described above
[all …]
/linux/Documentation/arch/loongarch/
H A Dintroduction.rst132 0x40 Timer Identifier TID
133 0x41 Timer Configuration TCFG
134 0x42 Timer Value TVAL
135 0x43 Compensation of Timer Count CNTC
136 0x44 Timer Interrupt Clearing TICLR
/linux/Documentation/arch/parisc/
H A Dregisters.rst22 CR16 (Interval Timer) read for cycle count/write starts Interval Tmr
68 S (Secure Interval Timer) 0
/linux/arch/arm/boot/dts/socionext/
H A Dmilbeaut-m10v.dtsi39 timer { /* The Generic Timer */
/linux/arch/mips/loongson2ef/
H A DKconfig76 bool "CS5536 MFGPT Timer"
/linux/arch/powerpc/boot/dts/fsl/
H A Dpq3-mpic-timer-B.dtsi2 * PQ3 MPIC Timer (Group B) device tree stub [ controller @ offset 0x42100 ]
H A Dpq3-etsec1-timer-0.dtsi2 * PQ3 eTSEC Timer (IEEE 1588) device tree stub [ @ offsets 0x24e00 ]
/linux/Documentation/devicetree/bindings/leds/
H A Dleds-netxbig.txt9 - timers: Timer array. Each timer entry is represented by three integers:
/linux/Documentation/devicetree/bindings/arm/bcm/
H A Dbrcm,bcm63138.txt58 Timer node:
/linux/drivers/clk/ingenic/
H A DKconfig93 Support the clocks of the Timer/Counter Unit (TCU) of the Ingenic
/linux/arch/mips/cavium-octeon/
H A DKconfig84 tristate "Module to measure interrupt latency using Octeon CIU Timer"
/linux/arch/arm/mach-s3c/
H A DKconfig122 Compile in platform device definition for PWM Timer

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