179fbf76dSRob HerringAtmel system registers 279fbf76dSRob Herring 379fbf76dSRob HerringChipid required properties: 465d41b14SClaudiu Beznea- compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid" 579fbf76dSRob Herring- reg : Should contain registers location and length 679fbf76dSRob Herring 779fbf76dSRob HerringPIT Timer required properties: 879fbf76dSRob Herring- compatible: Should be "atmel,at91sam9260-pit" 979fbf76dSRob Herring- reg: Should contain registers location and length 1079fbf76dSRob Herring- interrupts: Should contain interrupt for the PIT which is the IRQ line 1179fbf76dSRob Herring shared across all System Controller members. 1279fbf76dSRob Herring 13625022a5SClaudiu BezneaPIT64B Timer required properties: 14*1afe599aSVarshini Rajendran- compatible: Should be "microchip,sam9x60-pit64b" or 15*1afe599aSVarshini Rajendran "microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b" 16625022a5SClaudiu Beznea- reg: Should contain registers location and length 17625022a5SClaudiu Beznea- interrupts: Should contain interrupt for PIT64B timer 18625022a5SClaudiu Beznea- clocks: Should contain the available clock sources for PIT64B timer. 19625022a5SClaudiu Beznea 2079fbf76dSRob HerringSystem Timer (ST) required properties: 2179fbf76dSRob Herring- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd" 2279fbf76dSRob Herring- reg: Should contain registers location and length 2379fbf76dSRob Herring- interrupts: Should contain interrupt for the ST which is the IRQ line 2479fbf76dSRob Herring shared across all System Controller members. 2579fbf76dSRob Herring- clocks: phandle to input clock. 2679fbf76dSRob HerringIts subnodes can be: 2779fbf76dSRob Herring- watchdog: compatible should be "atmel,at91rm9200-wdt" 2879fbf76dSRob Herring 2979fbf76dSRob HerringRAMC SDRAM/DDR Controller required properties: 3079fbf76dSRob Herring- compatible: Should be "atmel,at91rm9200-sdramc", "syscon" 3179fbf76dSRob Herring "atmel,at91sam9260-sdramc", 3279fbf76dSRob Herring "atmel,at91sam9g45-ddramc", 3379fbf76dSRob Herring "atmel,sama5d3-ddramc", 34b6862714SClaudiu Beznea "microchip,sam9x60-ddramc", 35*1afe599aSVarshini Rajendran "microchip,sama7g5-uddrc", 36*1afe599aSVarshini Rajendran "microchip,sam9x7-ddramc", "atmel,sama5d3-ddramc". 3779fbf76dSRob Herring- reg: Should contain registers location and length 3879fbf76dSRob Herring 3979fbf76dSRob HerringExamples: 4079fbf76dSRob Herring 4179fbf76dSRob Herring ramc0: ramc@ffffe800 { 4279fbf76dSRob Herring compatible = "atmel,at91sam9g45-ddramc"; 4379fbf76dSRob Herring reg = <0xffffe800 0x200>; 4479fbf76dSRob Herring }; 4579fbf76dSRob Herring 4679fbf76dSRob HerringSecurity Module (SECUMOD) 4779fbf76dSRob Herring 4879fbf76dSRob HerringThe Security Module macrocell provides all necessary secure functions to avoid 4979fbf76dSRob Herringvoltage, temperature, frequency and mechanical attacks on the chip. It also 506bd925a8SAndrei.Stefanescu@microchip.comembeds secure memories that can be scrambled. 516bd925a8SAndrei.Stefanescu@microchip.com 526bd925a8SAndrei.Stefanescu@microchip.comThe Security Module also offers the PIOBU pins which can be used as GPIO pins. 536bd925a8SAndrei.Stefanescu@microchip.comNote that they maintain their voltage during Backup/Self-refresh. 5479fbf76dSRob Herring 5579fbf76dSRob Herringrequired properties: 5679fbf76dSRob Herring- compatible: Should be "atmel,<chip>-secumod", "syscon". 5779fbf76dSRob Herring <chip> can be "sama5d2". 5879fbf76dSRob Herring- reg: Should contain registers location and length 596bd925a8SAndrei.Stefanescu@microchip.com- gpio-controller: Marks the port as GPIO controller. 606bd925a8SAndrei.Stefanescu@microchip.com- #gpio-cells: There are 2. The pin number is the 616bd925a8SAndrei.Stefanescu@microchip.com first, the second represents additional 626bd925a8SAndrei.Stefanescu@microchip.com parameters such as GPIO_ACTIVE_HIGH/LOW. 636bd925a8SAndrei.Stefanescu@microchip.com 6479fbf76dSRob Herring 6579fbf76dSRob Herring secumod@fc040000 { 6679fbf76dSRob Herring compatible = "atmel,sama5d2-secumod", "syscon"; 6779fbf76dSRob Herring reg = <0xfc040000 0x100>; 686bd925a8SAndrei.Stefanescu@microchip.com gpio-controller; 696bd925a8SAndrei.Stefanescu@microchip.com #gpio-cells = <2>; 7079fbf76dSRob Herring }; 71