Searched refs:TCSR (Results 1 – 7 of 7) sorted by relevance
25 - 每个TCU通道都有自己的时钟源，可以通过 TCSR 寄存器设置通道的父级时钟28 - 看门狗和OST硬件模块在它们的寄存器空间中也有相同形式的TCSR寄存器。
25 - 每個TCU通道都有自己的時鐘源，可以通過 TCSR 寄存器設置通道的父級時鐘28 - 看門狗和OST硬件模塊在它們的寄存器空間中也有相同形式的TCSR寄存器。
19 different clocks (pclk, ext, rtc), gated, and reclocked, through their TCSR register.21 - The watchdog and OST hardware blocks also feature a TCSR register with the same
92 #define TCSR 0x04 /* Control/Status */ macro
117 #define TCSR 0x206 /* Timer Control/Status Register */ macro
43 tristate "Eliza TCSR Clock Controller"48 Support for the TCSR clock controller on Eliza devices.105 tristate "Glymur TCSR Clock Controller"110 Support for the TCSR clock controller on Glymur devices.166 tristate "Kaanapali TCSR Clock Controller"171 Support for the TCSR clock controller on Kaanapali devices.289 tristate "X1E80100 TCSR Clock Controller"294 Support for the TCSR clock controller on X1E80100 devices.437 tristate "Hawi TCSR Clock Controller"441 Support for the TCSR clock controller on Hawi devices.[all …]
90 Definition: a phandle reference to a syscon representing TCSR followed