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Searched refs:Register (Results 1 – 25 of 141) sorted by relevance

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/linux/drivers/scsi/pcmcia/
H A Dnsp_io.h21 unsigned int Register,
24 unsigned int Register);
48 unsigned int Register) in nsp_index_read() argument
50 outb(Register, BaseAddr + INDEXREG); in nsp_index_read()
55 unsigned int Register, in nsp_index_write() argument
58 outb(Register, BaseAddr + INDEXREG); in nsp_index_write()
68 unsigned int Register, in nsp_multi_read_1() argument
72 insb(BaseAddr + Register, buf, count); in nsp_multi_read_1()
87 unsigned int Register, in nsp_multi_read_2() argument
91 insw(BaseAddr + Register, buf, count); in nsp_multi_read_2()
[all …]
/linux/Documentation/scsi/
H A Dhptiop.rst8 Controller Register Map
14 BAR0 offset Register
21 BAR2 offset Register
23 0x10 Inbound Message Register 0
24 0x14 Inbound Message Register 1
25 0x18 Outbound Message Register 0
26 0x1C Outbound Message Register 1
27 0x20 Inbound Doorbell Register
28 0x24 Inbound Interrupt Status Register
29 0x28 Inbound Interrupt Mask Register
[all …]
/linux/Documentation/driver-api/mmc/
H A Dmmc-dev-attrs.rst20 cid Card Identification Register
21 csd Card Specific Data Register
22 scr SD Card Configuration Register (SD only)
23 date Manufacturing Date (from CID Register)
24 fwrev Firmware/Product Revision (from CID Register)
26 hwrev Hardware/Product Revision (from CID Register)
28 manfid Manufacturer ID (from CID Register)
29 name Product Name (from CID Register)
30 oemid OEM/Application ID (from CID Register)
31 prv Product Revision (from CID Register)
[all …]
/linux/Documentation/sound/codecs/
H A Dtas675x.rst23 :Register: 0x32 bits [1:0]
54 :Register: 0x4A (CH1/CH2), 0x4B (CH3/CH4)
63 :Register: 0x4E bits [3:2]
73 :Register: 0x40 (CH1), 0x41 (CH2), 0x42 (CH3), 0x43 (CH4)
82 :Register: 0x44 bits [7:6]
91 :Register: 0x44 bits [5:4]
100 :Register: 0x44 bits [3:2]
109 :Register: 0x44 bits [1:0]
118 :Register: 0x46 bits [1:0]
127 :Register: 0x46 bits [3:2]
[all …]
/linux/arch/arm/include/debug/
H A Dat91.S19 strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register
23 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
32 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
H A Dvf.S23 strb \rd, [\rx, #0x7] @ Data Register
27 1001: ldrb \rd, [\rx, #0x4] @ Status Register 1
H A Dstm32.S34 1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register
40 1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register
/linux/Documentation/driver-api/cxl/platform/example-configurations/
H A Dhb-interleave.rst24 Register base : 0000010370400000
25 Register length : 0000000000010000
33 Register base : 0000010380800000
34 Register length : 0000000000010000
H A Dflexible.rst29 Register base : 0000010370400000
30 Register length : 0000000000010000
38 Register base : 0000010380800000
39 Register length : 0000000000010000
H A Dmulti-dev-per-hb.rst25 Register base : 0000010370400000
26 Register length : 0000000000010000
/linux/Documentation/gpu/xe/
H A Dxe_gt_mcr.rst4 GT Multicast/Replicated (MCR) Register Support
8 :doc: GT Multicast/Replicated (MCR) Register Support
H A Dxe_rtp.rst4 Register Table Processing
8 :doc: Register Table Processing
/linux/Documentation/ABI/testing/
H A Ddebugfs-intel-iommu13 IOMMU: dmar0 Register Base Address: 26be37000
24 IOMMU: dmar1 Register Base Address: fed90000
35 IOMMU: dmar2 Register Base Address: fed91000
191 IOMMU: dmar0 Register Base Address: 26be37000
200 IOMMU: dmar2 Register Base Address: fed91000
213 IOMMU: dmar0 Register Base Address: 26be37000
/linux/rust/kernel/net/phy/
H A Dreg.rs45 pub trait Register: private::Sealed { in read()
87 /// MMD Register control.
89 /// MMD Register address data.
106 impl Register for C22 { in read()
198 impl Register for C45 { in read()
43 pub trait Register: private::Sealed { global() interface
/linux/Documentation/arch/m68k/
H A Dbuddha-driver.rst10 Register map of the Buddha IDE controller and the
45 $7fe Speed-select Register: Read & Write
48 $800-$8ff IDE-Select 0 (Port 0, Register set 0)
50 $900-$9ff IDE-Select 1 (Port 0, Register set 1)
52 $a00-$aff IDE-Select 2 (Port 1, Register set 0)
54 $b00-$bff IDE-Select 3 (Port 1, Register set 1)
56 $c00-$cff IDE-Select 4 (Port 2, Register set 0,
59 $d00-$dff IDE-Select 5 (Port 3, Register set 1,
/linux/drivers/mtd/chips/
H A DKconfig167 erased. Each Protection Register can be accessed multiple times to
170 Each Protection Register has an associated Lock Register bit. When a
171 Lock Register bit is programmed, the associated Protection Register
173 because the Lock Register bits themselves are OTP, when programmed,
174 Lock Register bits cannot be erased. Therefore, when a Protection
175 Register is locked, it cannot be unlocked.
/linux/Documentation/arch/parisc/
H A Dregisters.rst2 Register Usage for Linux/PA-RISC
24 CR19 Interrupt Instruction Register
25 CR20 Interrupt Space Register
26 CR21 Interrupt Offset Register
108 Register usage notes, originally from John Marvin, with some additional
/linux/Documentation/arch/powerpc/
H A Dsyscall64-abi.rst47 Register preservation rules
49 Register preservation rules match the ELF ABI calling sequence with some
55 | Register | Preservation Rules | Purpose |
73 | Register | Preservation Rules | Purpose |
136 Register preservation rules
/linux/drivers/soc/rockchip/
H A DKconfig9 bool "Rockchip General Register Files support" if COMPILE_TEST
12 The General Register Files are a central component providing
/linux/Documentation/w1/slaves/
H A Dw1_ds2438.rst30 Status/Configuration Register.
57 This file controls the 2-byte Offset Register of the chip.
58 Writing a 2-byte value will change the Offset Register, which changes the
/linux/Documentation/arch/xtensa/
H A Datomctl.rst2 Atomic Operation Control (ATOMCTL) Register
5 We Have Atomic Operation Control (ATOMCTL) Register.
/linux/Documentation/input/devices/
H A Dsentelic.rst510 Programming Sequence for Register Reading/Writing
513 Register inversion requirement:
520 Register swapping requirement:
527 Register reading sequence:
538 inverted(refer to the 'Register inversion requirement' section),
546 swapped(refer to the 'Register swapping requirement' section),
572 Register writing sequence:
577 inverted(refer to the 'Register inversion requirement' section),
585 swapped(refer to the 'Register swapping requirement' section),
599 inverted(refer to the 'Register inversion requirement' section),
[all …]
/linux/arch/arc/boot/dts/
H A Daxs10x_mb.dtsi104 * to use "Hold Register" if card is enumerated in SDR12 or
107 * Utilization of "Hold Register" is already implemented via
114 * Most probably "Hold Register" utilization is platform-
/linux/arch/arm/mach-shmobile/
H A Dheadsmp-scu.S24 ldr r2, [r0, #8] @ SCU Power Status Register
/linux/Documentation/bpf/
H A Dlinux-notes.rst65 * Register R6 is an implicit input that must contain a pointer to a
67 * Register R0 is an implicit output which contains the data fetched from

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