Home
last modified time | relevance | path

Searched refs:RENDER_RING_BASE (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/i915/
H A Di915_cmd_parser.c620 REG64_IDX(RING_TIMESTAMP, RENDER_RING_BASE),
621 REG64_IDX(MI_PREDICATE_SRC0, RENDER_RING_BASE),
622 REG64_IDX(MI_PREDICATE_SRC1, RENDER_RING_BASE),
652 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 0),
653 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 1),
654 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 2),
655 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 3),
656 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 4),
657 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 5),
658 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 6),
[all …]
H A Di915_ioctl.c32 .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),
33 .offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE),
/linux/drivers/gpu/drm/xe/
H A Dxe_wa.c316 XE_RTP_ACTIONS(SET(FF_THREAD_MODE(RENDER_RING_BASE),
337 XE_RTP_ACTIONS(SET(CS_DEBUG_MODE1(RENDER_RING_BASE),
346 XE_RTP_ACTIONS(SET(FF_SLICE_CS_CHICKEN1(RENDER_RING_BASE),
402 XE_RTP_ACTIONS(SET(RING_PSMI_CTL(RENDER_RING_BASE),
411 XE_RTP_ACTIONS(SET(RING_PSMI_CTL(RENDER_RING_BASE),
420 XE_RTP_ACTIONS(SET(RING_PSMI_CTL(RENDER_RING_BASE),
510 XE_RTP_ACTIONS(SET(RING_HWSTAM(RENDER_RING_BASE), ~0))
628 XE_RTP_ACTIONS(FIELD_SET(CS_CHICKEN1(RENDER_RING_BASE),
H A Dxe_reg_whitelist.c75 XE_RTP_ACTIONS(WHITELIST(CSBE_DEBUG_STATUS(RENDER_RING_BASE), 0))
H A Dxe_hw_engine.c63 .mmio_base = RENDER_RING_BASE,
/linux/drivers/gpu/drm/xe/regs/
H A Dxe_engine_regs.h18 #define RENDER_RING_BASE 0x02000 macro
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_engine_cs.c68 { .graphics_ver = 1, .base = RENDER_RING_BASE }