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Searched refs:REG_UPDATE_2 (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_vpg.c59 REG_UPDATE_2(VPG_MEM_PWR, VPG_GSP_MEM_LIGHT_SLEEP_DIS, 0, VPG_GSP_LIGHT_SLEEP_FORCE, 1); in vpg31_powerdown()
74 REG_UPDATE_2(VPG_MEM_PWR, VPG_GSP_MEM_LIGHT_SLEEP_DIS, 1, VPG_GSP_LIGHT_SLEEP_FORCE, 0); in vpg31_poweron()
H A Ddcn31_afmt.c64 REG_UPDATE_2(AFMT_MEM_PWR, AFMT_MEM_PWR_DIS, 0, AFMT_MEM_PWR_FORCE, 1); in afmt31_powerdown()
74 REG_UPDATE_2(AFMT_MEM_PWR, AFMT_MEM_PWR_DIS, 1, AFMT_MEM_PWR_FORCE, 0); in afmt31_poweron()
/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_afmt.c59 REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2, in afmt3_setup_hdmi_audio()
66 REG_UPDATE_2(AFMT_60958_0, in afmt3_setup_hdmi_audio()
181 REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2, in afmt3_setup_dp_audio()
H A Ddcn30_mmhubbub.c152 REG_UPDATE_2(MCIF_WB_BUF_PITCH, MCIF_WB_BUF_LUMA_PITCH, params->luma_pitch >> 8, in mmhubbub3_config_mcif_buf()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce/
H A Ddce_hwseq.c186 REG_UPDATE_2(PHYPLL_PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
196 REG_UPDATE_2(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn20/
H A Ddcn20_dccg.c113 REG_UPDATE_2(OTG_PIXEL_RATE_CNTL[otg_inst], in dccg2_otg_add_pixel()
125 REG_UPDATE_2(OTG_PIXEL_RATE_CNTL[otg_inst], in dccg2_otg_drop_pixel()
/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dwb.c78 REG_UPDATE_2(CNV_SOURCE_SIZE, CNV_SOURCE_WIDTH, params->cnv_params.src_width, in dwb2_config_dwb_cnv()
256 REG_UPDATE_2(WBSCL_MODE, WBSCL_MODE, params->out_format, in dwb2_set_scaler()
/linux/drivers/gpu/drm/amd/display/dc/dcn201/
H A Ddcn201_mpc.c51 REG_UPDATE_2(MUX[opp_id], in mpc201_set_out_rate_control()
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn301/
H A Ddcn301_optc.c67 REG_UPDATE_2(OTG_V_TOTAL_CONTROL, in optc301_set_drr()
/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_reg.h92 #define REG_UPDATE_2(reg, f1, v1, f2, v2) \ macro
/linux/drivers/gpu/drm/amd/display/dc/dwb/dcn30/
H A Ddcn30_dwb_cm.c179 REG_UPDATE_2(DWB_OGAM_LUT_CONTROL, in dwb3_configure_ogam_lut()