118b4f1a0SMichael Strauss /*
218b4f1a0SMichael Strauss * Copyright 2019 Advanced Micro Devices, Inc.
318b4f1a0SMichael Strauss *
418b4f1a0SMichael Strauss * Permission is hereby granted, free of charge, to any person obtaining a
518b4f1a0SMichael Strauss * copy of this software and associated documentation files (the "Software"),
618b4f1a0SMichael Strauss * to deal in the Software without restriction, including without limitation
718b4f1a0SMichael Strauss * the rights to use, copy, modify, merge, publish, distribute, sublicense,
818b4f1a0SMichael Strauss * and/or sell copies of the Software, and to permit persons to whom the
918b4f1a0SMichael Strauss * Software is furnished to do so, subject to the following conditions:
1018b4f1a0SMichael Strauss *
1118b4f1a0SMichael Strauss * The above copyright notice and this permission notice shall be included in
1218b4f1a0SMichael Strauss * all copies or substantial portions of the Software.
1318b4f1a0SMichael Strauss *
1418b4f1a0SMichael Strauss * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1518b4f1a0SMichael Strauss * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1618b4f1a0SMichael Strauss * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
1718b4f1a0SMichael Strauss * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
1818b4f1a0SMichael Strauss * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
1918b4f1a0SMichael Strauss * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2018b4f1a0SMichael Strauss * OTHER DEALINGS IN THE SOFTWARE.
2118b4f1a0SMichael Strauss *
2218b4f1a0SMichael Strauss * Authors: AMD
2318b4f1a0SMichael Strauss *
2418b4f1a0SMichael Strauss */
2518b4f1a0SMichael Strauss
2618b4f1a0SMichael Strauss #include "dc_bios_types.h"
2718b4f1a0SMichael Strauss #include "dcn30/dcn30_vpg.h"
2818b4f1a0SMichael Strauss #include "dcn31_vpg.h"
2918b4f1a0SMichael Strauss #include "reg_helper.h"
3018b4f1a0SMichael Strauss #include "dc/dc.h"
3118b4f1a0SMichael Strauss
3218b4f1a0SMichael Strauss #define DC_LOGGER \
3318b4f1a0SMichael Strauss vpg31->base.ctx->logger
3418b4f1a0SMichael Strauss
3518b4f1a0SMichael Strauss #define REG(reg)\
3618b4f1a0SMichael Strauss (vpg31->regs->reg)
3718b4f1a0SMichael Strauss
3818b4f1a0SMichael Strauss #undef FN
3918b4f1a0SMichael Strauss #define FN(reg_name, field_name) \
4018b4f1a0SMichael Strauss vpg31->vpg_shift->field_name, vpg31->vpg_mask->field_name
4118b4f1a0SMichael Strauss
4218b4f1a0SMichael Strauss
4318b4f1a0SMichael Strauss #define CTX \
4418b4f1a0SMichael Strauss vpg31->base.ctx
4518b4f1a0SMichael Strauss
4618b4f1a0SMichael Strauss static struct vpg_funcs dcn31_vpg_funcs = {
4718b4f1a0SMichael Strauss .update_generic_info_packet = vpg3_update_generic_info_packet,
4818b4f1a0SMichael Strauss .vpg_poweron = vpg31_poweron,
4918b4f1a0SMichael Strauss .vpg_powerdown = vpg31_powerdown,
5018b4f1a0SMichael Strauss };
5118b4f1a0SMichael Strauss
vpg31_powerdown(struct vpg * vpg)5218b4f1a0SMichael Strauss void vpg31_powerdown(struct vpg *vpg)
5318b4f1a0SMichael Strauss {
5418b4f1a0SMichael Strauss struct dcn31_vpg *vpg31 = DCN31_VPG_FROM_VPG(vpg);
5518b4f1a0SMichael Strauss
5618b4f1a0SMichael Strauss if (vpg->ctx->dc->debug.enable_mem_low_power.bits.vpg == false)
5718b4f1a0SMichael Strauss return;
5818b4f1a0SMichael Strauss
5918b4f1a0SMichael Strauss REG_UPDATE_2(VPG_MEM_PWR, VPG_GSP_MEM_LIGHT_SLEEP_DIS, 0, VPG_GSP_LIGHT_SLEEP_FORCE, 1);
6018b4f1a0SMichael Strauss }
6118b4f1a0SMichael Strauss
vpg31_poweron(struct vpg * vpg)6218b4f1a0SMichael Strauss void vpg31_poweron(struct vpg *vpg)
6318b4f1a0SMichael Strauss {
6418b4f1a0SMichael Strauss struct dcn31_vpg *vpg31 = DCN31_VPG_FROM_VPG(vpg);
6518b4f1a0SMichael Strauss
66*7cc91966SDillon Varone uint32_t vpg_gsp_mem_pwr_state;
67*7cc91966SDillon Varone
68*7cc91966SDillon Varone REG_GET(VPG_MEM_PWR, VPG_GSP_MEM_PWR_STATE, &vpg_gsp_mem_pwr_state);
69*7cc91966SDillon Varone
70*7cc91966SDillon Varone if (vpg->ctx->dc->debug.enable_mem_low_power.bits.vpg == false &&
71*7cc91966SDillon Varone vpg_gsp_mem_pwr_state == 0)
7218b4f1a0SMichael Strauss return;
7318b4f1a0SMichael Strauss
7418b4f1a0SMichael Strauss REG_UPDATE_2(VPG_MEM_PWR, VPG_GSP_MEM_LIGHT_SLEEP_DIS, 1, VPG_GSP_LIGHT_SLEEP_FORCE, 0);
7518b4f1a0SMichael Strauss }
7618b4f1a0SMichael Strauss
vpg31_construct(struct dcn31_vpg * vpg31,struct dc_context * ctx,uint32_t inst,const struct dcn31_vpg_registers * vpg_regs,const struct dcn31_vpg_shift * vpg_shift,const struct dcn31_vpg_mask * vpg_mask)7718b4f1a0SMichael Strauss void vpg31_construct(struct dcn31_vpg *vpg31,
7818b4f1a0SMichael Strauss struct dc_context *ctx,
7918b4f1a0SMichael Strauss uint32_t inst,
8018b4f1a0SMichael Strauss const struct dcn31_vpg_registers *vpg_regs,
8118b4f1a0SMichael Strauss const struct dcn31_vpg_shift *vpg_shift,
8218b4f1a0SMichael Strauss const struct dcn31_vpg_mask *vpg_mask)
8318b4f1a0SMichael Strauss {
8418b4f1a0SMichael Strauss vpg31->base.ctx = ctx;
8518b4f1a0SMichael Strauss
8618b4f1a0SMichael Strauss vpg31->base.inst = inst;
8718b4f1a0SMichael Strauss vpg31->base.funcs = &dcn31_vpg_funcs;
8818b4f1a0SMichael Strauss
8918b4f1a0SMichael Strauss vpg31->regs = vpg_regs;
9018b4f1a0SMichael Strauss vpg31->vpg_shift = vpg_shift;
9118b4f1a0SMichael Strauss vpg31->vpg_mask = vpg_mask;
9218b4f1a0SMichael Strauss }
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