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Searched refs:RD (Results 1 – 25 of 41) sorted by relevance

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/linux/arch/x86/crypto/
H A Dserpent-sse2-i586-asm_32.S30 #define RD %xmm3 macro
513 read_blocks(%eax, RA, RB, RC, RD, RT0, RT1, RE);
515 K(RA, RB, RC, RD, RE, 0);
516 S0(RA, RB, RC, RD, RE); LK(RC, RB, RD, RA, RE, 1);
517 S1(RC, RB, RD, RA, RE); LK(RE, RD, RA, RC, RB, 2);
518 S2(RE, RD, RA, RC, RB); LK(RB, RD, RE, RC, RA, 3);
519 S3(RB, RD, RE, RC, RA); LK(RC, RA, RD, RB, RE, 4);
520 S4(RC, RA, RD, RB, RE); LK(RA, RD, RB, RE, RC, 5);
521 S5(RA, RD, RB, RE, RC); LK(RC, RA, RD, RE, RB, 6);
522 S6(RC, RA, RD, RE, RB); LK(RD, RB, RA, RE, RC, 7);
[all …]
H A Dserpent-sse2-x86_64-asm_64.S636 K2(RA, RB, RC, RD, RE, 0);
637 S(S0, RA, RB, RC, RD, RE); LK2(RC, RB, RD, RA, RE, 1);
638 S(S1, RC, RB, RD, RA, RE); LK2(RE, RD, RA, RC, RB, 2);
639 S(S2, RE, RD, RA, RC, RB); LK2(RB, RD, RE, RC, RA, 3);
640 S(S3, RB, RD, RE, RC, RA); LK2(RC, RA, RD, RB, RE, 4);
641 S(S4, RC, RA, RD, RB, RE); LK2(RA, RD, RB, RE, RC, 5);
642 S(S5, RA, RD, RB, RE, RC); LK2(RC, RA, RD, RE, RB, 6);
643 S(S6, RC, RA, RD, RE, RB); LK2(RD, RB, RA, RE, RC, 7);
644 S(S7, RD, RB, RA, RE, RC); LK2(RC, RA, RE, RD, RB, 8);
645 S(S0, RC, RA, RE, RD, RB); LK2(RE, RA, RD, RC, RB, 9);
[all …]
H A Dserpent-avx2-asm_64.S566 K2(RA, RB, RC, RD, RE, 0);
567 S(S0, RA, RB, RC, RD, RE); LK2(RC, RB, RD, RA, RE, 1);
568 S(S1, RC, RB, RD, RA, RE); LK2(RE, RD, RA, RC, RB, 2);
569 S(S2, RE, RD, RA, RC, RB); LK2(RB, RD, RE, RC, RA, 3);
570 S(S3, RB, RD, RE, RC, RA); LK2(RC, RA, RD, RB, RE, 4);
571 S(S4, RC, RA, RD, RB, RE); LK2(RA, RD, RB, RE, RC, 5);
572 S(S5, RA, RD, RB, RE, RC); LK2(RC, RA, RD, RE, RB, 6);
573 S(S6, RC, RA, RD, RE, RB); LK2(RD, RB, RA, RE, RC, 7);
574 S(S7, RD, RB, RA, RE, RC); LK2(RC, RA, RE, RD, RB, 8);
575 S(S0, RC, RA, RE, RD, RB); LK2(RE, RA, RD, RC, RB, 9);
[all …]
H A Dtwofish-avx-x86_64-asm_64.S189 encrypt_round((2*n), RA, RB, RC, RD, preload_rgi, rotate_1l); \
190 encrypt_round(((2*n) + 1), RC, RD, RA, RB, preload_rgi, rotate_1l);
193 encrypt_round((2*n), RA, RB, RC, RD, preload_rgi, rotate_1l); \
194 encrypt_round(((2*n) + 1), RC, RD, RA, RB, dummy, dummy);
197 decrypt_round(((2*n) + 1), RC, RD, RA, RB, preload_rgi, rotate_1l); \
198 decrypt_round((2*n), RA, RB, RC, RD, preload_rgi, rotate_1l);
201 decrypt_round(((2*n) + 1), RC, RD, RA, RB, preload_rgi, rotate_1l); \
202 decrypt_round((2*n), RA, RB, RC, RD, dummy, dummy);
H A Dcast6-avx-x86_64-asm_64.S157 qop(RD, RC, 1); \
166 qop(RA, RD, 1);
170 qop(RA, RD, 1); \
179 qop(RD, RC, 1);
/linux/arch/mips/mm/
H A Duasm-mips.c52 [insn_addu] = {M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD},
53 [insn_and] = {M(spec_op, 0, 0, 0, 0, and_op), RS | RT | RD},
72 [insn_cfc1] = {M(cop1_op, cfc_op, 0, 0, 0, 0), RT | RD},
73 [insn_cfcmsa] = {M(msa_op, 0, msa_cfc_op, 0, 0, msa_elm_op), RD | RE},
74 [insn_ctc1] = {M(cop1_op, ctc_op, 0, 0, 0, 0), RT | RD},
75 [insn_ctcmsa] = {M(msa_op, 0, msa_ctc_op, 0, 0, msa_elm_op), RD | RE},
77 [insn_daddu] = {M(spec_op, 0, 0, 0, 0, daddu_op), RS | RT | RD},
80 RS | RT | RD},
82 [insn_dins] = {M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE},
83 [insn_dinsm] = {M(spec3_op, 0, 0, 0, 0, dinsm_op), RS | RT | RD | RE},
[all …]
H A Duasm-micromips.c43 [insn_addu] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_addu32_op), RT | RS | RD},
45 [insn_and] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_and_op), RT | RS | RD},
56 [insn_cfcmsa] = {M(mm_pool32s_op, 0, msa_cfc_op, 0, 0, mm_32s_elm_op), RD | RE},
58 [insn_ctcmsa] = {M(mm_pool32s_op, 0, msa_ctc_op, 0, 0, mm_32s_elm_op), RD | RE},
74 [insn_ins] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_ins_op), RT | RS | RD | RE},
75 [insn_ext] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_ext_op), RT | RS | RD | RE},
87 [insn_mfc0] = {M(mm_pool32a_op, 0, 0, 0, mm_mfc0_op, mm_pool32axf_op), RT | RS | RD},
90 [insn_mtc0] = {M(mm_pool32a_op, 0, 0, 0, mm_mtc0_op, mm_pool32axf_op), RT | RS | RD},
93 [insn_mul] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_mul_op), RT | RS | RD},
94 [insn_or] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_or32_op), RT | RS | RD},
[all …]
/linux/include/linux/ceph/
H A Drados.h206 f(READ, __CEPH_OSD_OP(RD, DATA, 1), "read") \
207 f(STAT, __CEPH_OSD_OP(RD, DATA, 2), "stat") \
208 f(MAPEXT, __CEPH_OSD_OP(RD, DATA, 3), "mapext") \
211 f(MASKTRUNC, __CEPH_OSD_OP(RD, DATA, 4), "masktrunc") \
212 f(SPARSE_READ, __CEPH_OSD_OP(RD, DATA, 5), "sparse-read") \
214 f(NOTIFY, __CEPH_OSD_OP(RD, DATA, 6), "notify") \
215 f(NOTIFY_ACK, __CEPH_OSD_OP(RD, DATA, 7), "notify-ack") \
218 f(ASSERT_VER, __CEPH_OSD_OP(RD, DATA, 8), "assert-version") \
220 f(LIST_WATCHERS, __CEPH_OSD_OP(RD, DATA, 9), "list-watchers") \
222 f(LIST_SNAPS, __CEPH_OSD_OP(RD, DATA, 10), "list-snaps") \
[all …]
/linux/arch/sparc/net/
H A Dbpf_jit_comp_32.c25 #define RD(X) ((X) << 25) macro
69 (F2(0, 0x4) | RD(REG) | (((K) >> 10) & 0x3fffff))
71 (F3(2, 0x02) | IMMED | RS1(REG) | ((K) & 0x3ff) | RD(REG))
113 *prog++ = SUB | RS1(G0) | RS2(r_A) | RD(r_A); \
118 *prog++ = OR | RS1(G0) | RS2(FROM) | RD(TO); \
123 *prog++ = OR | RS1(G0) | RS2(G0) | RD(REG); \
140 *prog++ = OPCODE | RS1(r_A) | RS2(r_X) | RD(r_A); \
161 _insn |= RS1(r_A) | RD(r_A); \
175 *prog++ = OR | IMMED | RS1(G0) | S13(K) | RD(DEST); \
184 *prog++ = LDPTRI | RS1(BASE) | S13(_off) | RD(DEST); \
[all …]
H A Dbpf_jit_comp_64.c54 #define RD(X) ((X) << 25) macro
137 (F2(0, 0x4) | RD(REG) | (((K) >> 10) & 0x3fffff))
139 (F3(2, 0x02) | IMMED | RS1(REG) | ((K) & 0x3ff) | RD(REG))
263 emit(OR | RS1(G0) | RS2(from) | RD(to), ctx); in emit_reg_move()
284 emit(XOR | IMMED | RS1(reg) | S13(lbits) | RD(reg), ctx); in emit_set_const_sext()
290 emit(opcode | RS1(dst) | RS2(src) | RD(dst), ctx); in emit_alu()
295 emit(opcode | RS1(a) | RS2(b) | RD(c), ctx); in emit_alu3()
304 insn |= RS1(dst) | RD(dst); in emit_alu_K()
323 insn |= RS1(src) | RD(dst); in emit_alu3_K()
340 emit(OR | IMMED | RS1(G0) | S13(K) | RD(dest), ctx); in emit_loadimm32()
[all …]
/linux/arch/sparc/kernel/
H A Dvisemul.c138 #define RD(INSN) (((INSN) >> 25) & 0x1f) macro
299 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0); in edge()
350 store_reg(regs, rd_val, RD(insn)); in edge()
377 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0); in array()
403 store_reg(regs, rd_val, RD(insn)); in array()
410 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0); in bmask()
415 store_reg(regs, rd_val, RD(insn)); in bmask()
445 *fpd_regaddr(f, RD(insn)) = rd_val; in bshuffle()
456 rd = fpd_regaddr(f, RD(insn)); in pdist()
503 *fps_regaddr(f, RD(insn)) = rd_val; in pformat()
[all …]
/linux/lib/crypto/powerpc/
H A Dsha1-powerpc-asm.S30 #define RD(t) ((((t)+1)%6)+7) macro
40 andc r0,RD(t),RB(t); \
53 andc r0,RD(t),RB(t); \
70 xor r6,r6,RD(t); \
80 xor r6,r6,RD(t); \
92 and r0,RB(t),RD(t); \
96 and r0,RC(t),RD(t); \
134 lwz RD(0),12(r3) /* D */
175 add RD(0),RD(80),r19
183 stw RD(0),12(r3)
/linux/arch/riscv/include/asm/
H A Dinsn-def.h197 RD(dest), RS1(addr), __RS2(3))
201 RD(dest), RS1(addr), __RS2(0))
206 RD(dest), RS1(addr), __RS2(0))
214 RD(dest), RS1(addr), __RS2(0))
218 RD(dest), RS1(addr), __RS2(0))
222 RD(dest), RS1(addr), __RS2(0))
226 RD(dest), RS1(addr), __RS2(0))
230 RD(dest), RS1(addr), __RS2(0))
234 RD(dest), RS1(addr), __RS2(0))
263 RD(dest), RS1(addr), __RS2(0))
[all …]
/linux/sound/soc/au1x/
H A Dac97c.c72 static inline unsigned long RD(struct au1xpsc_audio_data *ctx, int reg) in RD() function
96 while ((RD(ctx, AC97_STATUS) & STAT_CP) && --tmo) in au1xac97c_ac97_read()
109 while ((RD(ctx, AC97_STATUS) & STAT_CP) && --tmo) in au1xac97c_ac97_read()
111 data = RD(ctx, AC97_CMDRESP); in au1xac97c_ac97_read()
135 for (tmo = 5; (RD(ctx, AC97_STATUS) & STAT_CP) && tmo; tmo--) in au1xac97c_ac97_write()
144 for (tmo = 10; (RD(ctx, AC97_STATUS) & STAT_CP) && tmo; tmo--) in au1xac97c_ac97_write()
176 while (((RD(ctx, AC97_STATUS) & STAT_RD) == 0) && --i) in au1xac97c_ac97_cold_reset()
/linux/arch/arm64/boot/dts/marvell/
H A Dac5x-rd-carrier-cn9131.dts5 * Device tree for the AC5X RD Type 7 Com Express carrier board,
11 * AC5X RD works here in external mode (switch selectable at the back of the
17 * the AC5X RD becomes part of the carrier solution.
26 * And it accesses the switch end-point on the AC5X RD portion of the carrier
34 model = "Marvell Armada AC5X RD COM EXPRESS type 7 carrier board with CN9131 CPU module";
H A Dac5x-rd-carrier.dtsi5 * Device tree for the AC5X RD Type 7 Com Express carrier board,
10 * AC5X RD can either work as you would expect, as a complete standalone
17 * the AC5X RD becomes part of the carrier solution.
31 model = "Marvell Armada AC5X RD COM EXPRESS type 7 carrier board";
H A Dac5-98dx35xx-rd.dts3 * Device Tree For RD-AC5X.
18 model = "Marvell RD-AC5X Board";
/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Den_stats.c962 #define RD(name) \ in mlx5e_stats_eth_mac_get() macro
967 mac_stats->FramesTransmittedOK = RD(a_frames_transmitted_ok); in mlx5e_stats_eth_mac_get()
968 mac_stats->FramesReceivedOK = RD(a_frames_received_ok); in mlx5e_stats_eth_mac_get()
969 mac_stats->FrameCheckSequenceErrors = RD(a_frame_check_sequence_errors); in mlx5e_stats_eth_mac_get()
970 mac_stats->OctetsTransmittedOK = RD(a_octets_transmitted_ok); in mlx5e_stats_eth_mac_get()
971 mac_stats->OctetsReceivedOK = RD(a_octets_received_ok); in mlx5e_stats_eth_mac_get()
972 mac_stats->MulticastFramesXmittedOK = RD(a_multicast_frames_xmitted_ok); in mlx5e_stats_eth_mac_get()
973 mac_stats->BroadcastFramesXmittedOK = RD(a_broadcast_frames_xmitted_ok); in mlx5e_stats_eth_mac_get()
974 mac_stats->MulticastFramesReceivedOK = RD(a_multicast_frames_received_ok); in mlx5e_stats_eth_mac_get()
975 mac_stats->BroadcastFramesReceivedOK = RD(a_broadcast_frames_received_ok); in mlx5e_stats_eth_mac_get()
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Darmada-382-rd-ac3x-48g4x2xl.dts4 * (RD-AC3X-48G4X2XL)
15 model = "Marvell Armada 382 RD-AC3X";
H A Darmada-xp-axpwifiap.dts3 * Device Tree file for Marvell RD-AXPWiFiAP.
21 model = "Marvell RD-AXPWiFiAP";
/linux/arch/sh/include/mach-ecovec24/mach/
H A Dpartner-jet-setup.txt9 LIST "> RD zImage, 0xa8800000"
14 LIST "> RD romImage, 0"
/linux/tools/testing/ktest/
H A Dconfig-bisect.pl174 open (RD, ">$redirect") or
180 print RD if ($dord);
187 close(RD) if ($dord);
/linux/Documentation/spi/
H A Dspidev.rst122 return (RD) or assign (WR) the SPI transfer mode. Use the constants
131 which will return (RD) or assign (WR) the full SPI transfer mode,
136 which will return (RD) or assign (WR) the bit justification used to
144 a byte which will return (RD) or assign (WR) the number of bits in
149 u32 which will return (RD) or assign (WR) the maximum SPI transfer
/linux/arch/sh/include/mach-kfr2r09/mach/
H A Dpartner-jet-setup.txt8 LIST "> RD zImage, 0xa8800000"
13 LIST "> RD romImage, 0"
/linux/lib/crypto/x86/
H A Dsha1-avx2-asm.S108 .set RD, REG_RD define
329 .set RE, RD
330 .set RD, RC define

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