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Searched refs:RAS (Results 1 – 25 of 39) sorted by relevance

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/linux/Documentation/gpu/amdgpu/
H A Dras.rst2 AMDGPU RAS Support
5 The AMDGPU RAS interfaces are exposed via sysfs (for informational queries) and
8 RAS debugfs/sysfs Control and Error Injection Interfaces
12 :doc: AMDGPU RAS debugfs control interface
14 RAS Reboot Behavior for Unrecoverable Errors
18 :doc: AMDGPU RAS Reboot Behavior for Unrecoverable Errors
20 RAS Error Count sysfs Interface
24 :doc: AMDGPU RAS sysfs Error Count Interface
26 RAS EEPROM debugfs Interface
30 :doc: AMDGPU RAS debugfs EEPROM table reset interface
[all …]
/linux/drivers/ras/
H A DKconfig2 menuconfig RAS config
3 bool "Reliability, Availability and Serviceability (RAS) features"
5 Reliability, availability and serviceability (RAS) is a computer
7 of RAS have a multitude of features that protect data integrity
32 if RAS
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-platform-devices-ampere-smpro17 …| 04 | Error status | 4 | See ARM RAS specification for details …
19 …| 08 | Error Address | 8 | See ARM RAS specification for details …
21 …| 16 | Error Misc 0 | 8 | See ARM RAS specification for details …
23 …| 24 | Error Misc 1 | 8 | See ARM RAS specification for details …
25 …| 32 | Error Misc 2 | 8 | See ARM RAS specification for details …
27 …| 40 | Error Misc 3 | 8 | See ARM RAS specification for details …
175 Altra Family RAS Supplement`.
234 For details, see section `5.10 RAS Internal Error Register Definitions,
/linux/drivers/platform/x86/intel/ifs/
H A DKconfig8 operation beyond baseline RAS capabilities. To compile this
/linux/Documentation/edac/
H A Dscrub.rst143 which provides interfaces for platform RAS features and supports independent
144 RAS controls and capabilities for a given RAS feature for multiple instances
147 Memory RAS features apply to RAS capabilities, controls and operations that
148 are specific to memory. RAS2 PCC sub-spaces for memory-specific RAS features
/linux/Documentation/admin-guide/perf/
H A Ddwc_pcie_pmu.rst9 Port in a Vendor-Specific Extended Capability named RAS D.E.S (Debug, Error
12 As the name indicates, the RAS DES capability supports system level
/linux/tools/testing/selftests/kvm/arm64/
H A Dexternal_aborts.c57 return SYS_FIELD_GET(ID_AA64PFR0_EL1, RAS, pfr0); in vcpu_has_ras()
62 return SYS_FIELD_GET(ID_AA64PFR0_EL1, RAS, read_sysreg(id_aa64pfr0_el1)); in guest_has_ras()
H A Dget-reg-list.c67 REG_FEAT(VDISR_EL2, ID_AA64PFR0_EL1, RAS, IMP),
68 REG_FEAT(VSESR_EL2, ID_AA64PFR0_EL1, RAS, IMP),
/linux/Documentation/networking/device_drivers/ethernet/marvell/
H A Docteontx2.rst181 3. RAS events
183 - RAS Error Reporting for NPA_AQ_INST_S/NPA_AQ_RES_S.
241 3. RAS events
243 - RAS Error Reporting for NIX Receive Multicast/Mirror Entry Structure.
244 - RAS Error Reporting for WQE/Packet Data read from Multicast/Mirror Buffer..
245 - RAS Error Reporting for NIX_AQ_INST_S/NIX_AQ_RES_S.
/linux/Documentation/arch/arm64/
H A Dacpi_object_usage.rst35 compliant with the Arm RAS architecture.
55 Must be supplied if RAS support is provided by the platform. It
150 On a platform supports RAS, this table must be supplied if it is not
212 Must be supplied if RAS support is provided by the platform. It
356 **RAS Features 2 table**
358 This table provides interfaces for the RAS capabilities implemented in
363 **RAS Feature table**
/linux/arch/arm64/kvm/
H A Dconfig.c153 #define FEAT_RAS ID_AA64PFR0_EL1, RAS, IMP
154 #define FEAT_RASv2 ID_AA64PFR0_EL1, RAS, V2
241 return (kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, V1P1) || in feat_rasv1p1()
242 (kvm_has_feat_enum(kvm, ID_AA64PFR0_EL1, RAS, IMP) && in feat_rasv1p1()
H A Dsys_regs.c2012 SYS_FIELD_GET(ID_AA64PFR0_EL1, RAS, pfr0) == ID_AA64PFR0_EL1_RAS_IMP)) in sanitise_id_aa64pfr1_el1()
2953 if (!(kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, V1P1) || in access_ras()
2954 (kvm_has_feat_enum(kvm, ID_AA64PFR0_EL1, RAS, IMP) && in access_ras()
2961 if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, IMP)) { in access_ras()
/linux/arch/arm64/kvm/hyp/nvhe/
H A Dsys_regs.c97 MAX_FEAT(ID_AA64PFR0_EL1, RAS, IMP),
H A Dpkvm.c77 if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, IMP)) { in pvm_init_traps_hcr()
/linux/Documentation/translations/zh_CN/core-api/
H A Dcpu_hotplug.rst34 这样的进步要求内核可用的CPU被移除，要么是出于配置的原因，要么是出于RAS的目的，
/linux/arch/powerpc/xmon/
H A Dppc-opc.c530 #define RAS RAM + 1 macro
535 #define RAOPT RAS + 1
4964 {"stdux", X(31,181), X_MASK, PPC64, 0, {RS, RAS, RB}},
4969 {"stwux", X(31,183), X_MASK, PPCCOM, 0, {RS, RAS, RB}},
5056 {"stbux", X(31,247), X_MASK, COM, 0, {RS, RAS, RB}},
5483 {"sthux", X(31,439), X_MASK, COM, 0, {RS, RAS, RB}},
5821 {"lfsux", X(31,567), X_MASK, COM, PPCEFS, {FRT, RAS, RB}},
5877 {"lfdux", X(31,631), X_MASK, COM, PPCEFS, {FRT, RAS, RB}},
5930 {"stfsux", X(31,695), X_MASK, COM, PPCEFS, {FRS, RAS, RB}},
6009 {"stfdux", X(31,759), X_MASK, COM, PPCEFS, {FRS, RAS, RB}},
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramnv50.c109 timing[0] = (T(RP) << 24 | T(RAS) << 16 | T(RFC) << 8 | T(RC)); in nv50_ram_timing_calc()
H A Dramgt215.c374 timing[0] = (T(RP) << 24 | T(RAS) << 16 | T(RFC) << 8 | T(RC)); in gt215_ram_timing_calc()
/linux/drivers/cxl/
H A DKconfig129 of a memory RAS feature established by the platform/device.
/linux/Documentation/firmware-guide/acpi/apei/
H A Deinj.rst8 for debugging and testing APEI and RAS features in general.
/linux/drivers/firmware/
H A DKconfig37 into the OS. This is typically used to implement RAS notifications.
/linux/arch/arm64/kernel/
H A Dcpufeature.c2191 ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, RAS, V1P1) in has_rasv1p1()
2194 ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, RAS, IMP) in has_rasv1p1()
2677 ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, RAS, IMP)
/linux/Documentation/admin-guide/hw-vuln/
H A Drsb.rst13 Buffer (RSB) (sometimes referred to as the Return Address Stack (RAS) or
/linux/arch/arm64/include/asm/
H A Dkvm_host.h1598 (kvm_has_feat((k), ID_AA64PFR0_EL1, RAS, IMP))
/linux/drivers/pinctrl/renesas/
H A Dpfc-sh7720.c751 GPIO_FN(RAS),

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