Searched refs:PHY_TYPE_PCIE (Results 1 – 19 of 19) sorted by relevance
193 if (combophy->type != PHY_TYPE_PCIE) { in stm32_combophy_pll_init()253 if (combophy->type == PHY_TYPE_PCIE) { in stm32_combophy_pll_init()290 if (combophy->type == PHY_TYPE_PCIE && !combophy->have_pad_clk) in stm32_combophy_pll_init()294 if (combophy->type != PHY_TYPE_PCIE) in stm32_combophy_pll_init()302 if (combophy->type == PHY_TYPE_PCIE) { in stm32_combophy_pll_init()337 if (type != PHY_TYPE_USB3 && type != PHY_TYPE_PCIE) { in stm32_combophy_xlate()342 if (combophy->have_pad_clk && type != PHY_TYPE_PCIE) { in stm32_combophy_xlate()358 case PHY_TYPE_PCIE: in stm32_combophy_set_mode()425 if (combophy->type == PHY_TYPE_PCIE && !combophy->have_pad_clk) in stm32_combophy_exit()429 if (combophy->type != PHY_TYPE_PCIE) in stm32_combophy_exit()
267 case PHY_TYPE_PCIE: in rockchip_combphy_init()456 if (priv->type == PHY_TYPE_PCIE || priv->type == PHY_TYPE_USB3) { in rk_combphy_common_cfg_ssc()489 if (priv->type == PHY_TYPE_PCIE && rate == REF_CLOCK_24MHz) { in rk_combphy_common_cfg_ssc()529 case PHY_TYPE_PCIE: in rk3528_combphy_cfg()574 } else if (priv->type == PHY_TYPE_PCIE) { in rk3528_combphy_cfg()582 if (priv->type == PHY_TYPE_PCIE) { in rk3528_combphy_cfg()604 if (priv->type == PHY_TYPE_PCIE && rate == REF_CLOCK_100MHz) { in rk3528_combphy_cfg()626 if (priv->type == PHY_TYPE_PCIE && priv->enable_ssc) in rk3528_combphy_cfg()671 case PHY_TYPE_PCIE: in rk3562_combphy_cfg()728 if (priv->type == PHY_TYPE_PCIE) { in rk3562_combphy_cfg()[all …]
33 phys = <&serdes0 PHY_TYPE_PCIE 1>, <&serdes1 PHY_TYPE_PCIE 1>;
87 phys = <&serdes0 PHY_TYPE_PCIE 1>, <&serdes1 PHY_TYPE_PCIE 1>;
19 phys = <&serdes0 PHY_TYPE_PCIE 1>;
30 phys = <&serdes1 PHY_TYPE_PCIE 0>;
22 phys = <&serdes1 PHY_TYPE_PCIE 0>;
58 cdns,phy-type = <PHY_TYPE_PCIE>;
737 cdns,phy-type = <PHY_TYPE_PCIE>;747 cdns,phy-type = <PHY_TYPE_PCIE>;
67 phys = <&combphy1 PHY_TYPE_PCIE>;
176 if ((lg->is_pcie && args->args[1] != PHY_TYPE_PCIE) || in k3_combo_phy_xlate()
47 PHY_TYPE_PCIE = 1, enumerator
92 case PHY_TYPE_PCIE: in histb_combphy_set_mode()
365 if (mode != PHY_TYPE_USB3 && mode != PHY_TYPE_PCIE) { in phy_g12a_usb3_pcie_xlate()
393 phys = <&pcieport1 PHY_TYPE_PCIE>;
937 phys = <&u3port1 PHY_TYPE_PCIE>;969 phys = <&u3port0 PHY_TYPE_PCIE>;
458 case PHY_TYPE_PCIE: in serdes_am654_init()
808 case PHY_TYPE_PCIE: in xpsgtr_set_lane_type()
956 case PHY_TYPE_PCIE: in cdns_sierra_get_optional()