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Searched refs:PACKET3_CONTEXT_CONTROL (Results 1 – 21 of 21) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsi_enums.h192 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dnvd.h76 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dsoc15d.h105 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dvid.h131 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dcikd.h249 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dgfx_v7_0.c2275 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_ring_emit_cntxcntl()
2481 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_0_cp_gfx_start()
3891 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_0_get_csb_buffer()
H A Dsid.h1687 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dgfx_v8_0.c1222 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_0_get_csb_buffer()
4160 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_0_cp_gfx_start()
6331 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_ring_emit_cntxcntl()
H A Dgfx_v11_0.c824 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v11_0_get_csb_buffer()
3498 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v11_0_cp_gfx_start()
5864 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v11_0_ring_emit_cntxcntl()
H A Dgfx_v9_0.c1628 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_get_csb_buffer()
3310 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_cp_gfx_start()
5885 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_ring_emit_cntxcntl()
H A Dgfx_v10_0.c4254 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_get_csb_buffer()
6257 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_cp_gfx_start()
8760 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_ring_emit_cntxcntl()
H A Dgfx_v12_0.c4500 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v12_0_ring_emit_cntxcntl()
/linux/drivers/gpu/drm/radeon/
H A Dnid.h1179 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dsid.h1624 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dcikd.h1717 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dsi.c4537 case PACKET3_CONTEXT_CONTROL: in si_vm_packet3_gfx_check()
4650 case PACKET3_CONTEXT_CONTROL: in si_vm_packet3_compute_check()
5709 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in si_get_csb_buffer()
H A Devergreen_cs.c1828 case PACKET3_CONTEXT_CONTROL: in evergreen_packet3_check()
3378 case PACKET3_CONTEXT_CONTROL: in evergreen_vm_packet3_check()
H A Devergreend.h1564 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dr600d.h1600 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dr600_cs.c1688 case PACKET3_CONTEXT_CONTROL: in r600_packet3_check()
H A Dcik.c3999 radeon_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in cik_cp_gfx_start()
6713 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in cik_get_csb_buffer()