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Searched refs:OTG (Results 1 – 25 of 80) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn31/
H A Ddcn31_dccg.h47 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
48 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
49 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
50 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
116 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 0, mask_sh),\
117 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 1, mask_sh),\
118 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 2, mask_sh),\
119 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 3, mask_sh),\
120 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 0, mask_sh),\
121 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 1, mask_sh),\
[all …]
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn10/
H A Ddcn10_optc.h35 SRI(OTG_VSTARTUP_PARAM, OTG, inst),\
36 SRI(OTG_VUPDATE_PARAM, OTG, inst),\
37 SRI(OTG_VREADY_PARAM, OTG, inst),\
38 SRI(OTG_BLANK_CONTROL, OTG, inst),\
39 SRI(OTG_MASTER_UPDATE_LOCK, OTG, inst),\
40 SRI(OTG_GLOBAL_CONTROL0, OTG, inst),\
41 SRI(OTG_DOUBLE_BUFFER_CONTROL, OTG, inst),\
42 SRI(OTG_H_TOTAL, OTG, inst),\
43 SRI(OTG_H_BLANK_START_END, OTG, inst),\
44 SRI(OTG_H_SYNC_A, OTG, inst),\
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn32/
H A Ddcn32_dccg.h80 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 0, mask_sh),\
81 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 1, mask_sh),\
82 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 2, mask_sh),\
83 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 3, mask_sh),\
84 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 0, mask_sh),\
85 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 1, mask_sh),\
86 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 2, mask_sh),\
87 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 3, mask_sh),\
88 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 0, mask_sh),\
89 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 1, mask_sh),\
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn20/
H A Ddcn20_dccg.h38 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
39 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
51 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
52 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
53 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 4),\
54 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 5)
86 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
87 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
88 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 0, mask_sh),\
89 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 1, mask_sh),\
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn314/
H A Ddcn314_dccg.h52 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
53 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
54 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
55 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
113 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 0, mask_sh),\
114 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 1, mask_sh),\
115 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 2, mask_sh),\
116 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 3, mask_sh),\
117 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 0, mask_sh),\
118 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 1, mask_sh),\
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn303/
H A Ddcn303_dccg.h38 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
39 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1)
59 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
60 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
61 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 0, mask_sh),\
62 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 1, mask_sh)
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn35/
H A Ddcn35_dccg.h103 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 0, mask_sh),\
104 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 1, mask_sh),\
105 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 2, mask_sh),\
106 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 3, mask_sh),\
107 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 0, mask_sh),\
108 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 1, mask_sh),\
109 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 2, mask_sh),\
110 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLKDTO, ENABLE_STATUS, 3, mask_sh),\
111 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 0, mask_sh),\
112 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 1, mask_sh),\
[all …]
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn201/
H A Ddcn201_optc.h33 SRI(OTG_GLOBAL_CONTROL1, OTG, inst),\
34 SRI(OTG_GLOBAL_CONTROL2, OTG, inst),\
35 SRI(OTG_GSL_WINDOW_X, OTG, inst),\
36 SRI(OTG_GSL_WINDOW_Y, OTG, inst),\
37 SRI(OTG_VUPDATE_KEEPOUT, OTG, inst),\
38 SRI(OTG_DSC_START_POSITION, OTG, inst),\
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn30/
H A Ddcn30_dccg.h35 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
36 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
37 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 4),\
38 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 5),\
/linux/drivers/usb/phy/
H A DKconfig19 Enable this to support the USB OTG transceiver in AB8500 chip.
24 tristate "Freescale USB OTG Transceiver Driver"
29 Enable this to support Freescale USB OTG transceiver.
68 Enable this to support the USB OTG transceiver on TWL6030
70 and OTG SRP events capabilities. For all other transceiver functionality
86 NOT support role switch. OTG devices that can do role switch
91 tristate "OMAP USB OTG controller driver"
94 Enable this to support some transceivers on OMAP1 platforms. OTG
124 and OTG drivers (to be selected separately).
154 Enable this to support ULPI connected USB OTG transceivers which
/linux/Documentation/ABI/stable/
H A Dsysfs-class-udc6 Indicates if an OTG A-Host supports HNP at an alternate port.
14 Indicates if an OTG A-Host supports HNP at this port.
22 Indicates if an OTG A-Host enabled HNP support.
38 Indicates that this port is the default Host on an OTG session
47 Indicates that this port support OTG.
/linux/drivers/usb/core/
H A DKconfig43 no more than 30 seconds (as required by the USB OTG spec).
60 bool "OTG support"
63 The most notable feature of USB OTG is support for a
73 bool "Rely on OTG and EH Targeted Peripherals List"
79 USB OTG and EH specification for all devices not on your product's
88 external hubs. OTG hosts are allowed to reduce hardware
90 are "Embedded Hosts" that don't offer OTG support.
93 tristate "USB 2.0 OTG FSM implementation"
97 Implements OTG Finite State Machine as specified in On-The-Go
/linux/Documentation/devicetree/bindings/extcon/
H A Dextcon-max3355.txt1 Maxim Integrated MAX3355 USB OTG chip
5 integrated USB OTG dual-role transceiver to function as a USB OTG dual-role
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn401/
H A Dirq_service_dcn401.c227 IRQ_REG_ENTRY(OTG, reg_num,\
237 IRQ_REG_ENTRY(OTG, reg_num,\
245 IRQ_REG_ENTRY(OTG, reg_num,\
252 IRQ_REG_ENTRY(OTG, reg_num,\
259 IRQ_REG_ENTRY(OTG, reg_num,\
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn32/
H A Dirq_service_dcn32.c247 IRQ_REG_ENTRY(OTG, reg_num,\
257 IRQ_REG_ENTRY(OTG, reg_num,\
265 IRQ_REG_ENTRY(OTG, reg_num,\
272 IRQ_REG_ENTRY(OTG, reg_num,\
279 IRQ_REG_ENTRY(OTG, reg_num,\
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn201/
H A Dirq_service_dcn201.c166 IRQ_REG_ENTRY(OTG, reg_num,\
177 IRQ_REG_ENTRY(OTG, reg_num,\
184 IRQ_REG_ENTRY(OTG, reg_num,\
192 IRQ_REG_ENTRY(OTG, reg_num,\
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn303/
H A Dirq_service_dcn303.c164 IRQ_REG_ENTRY(OTG, reg_num,\
172 IRQ_REG_ENTRY(OTG, reg_num,\
180 IRQ_REG_ENTRY(OTG, reg_num,\
/linux/drivers/usb/fotg210/
H A DKconfig20 Faraday FOTG210 is an OTG controller which can be configured as
31 Faraday USB2.0 OTG controller which can be configured as
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn20/
H A Dirq_service_dcn20.c222 IRQ_REG_ENTRY(OTG, reg_num,\
230 IRQ_REG_ENTRY(OTG, reg_num,\
238 IRQ_REG_ENTRY(OTG, reg_num,\
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn10/
H A Dirq_service_dcn10.c217 IRQ_REG_ENTRY(OTG, reg_num,\
225 IRQ_REG_ENTRY(OTG, reg_num,\
233 IRQ_REG_ENTRY(OTG, reg_num,\
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn302/
H A Dirq_service_dcn302.c240 IRQ_REG_ENTRY(OTG, reg_num,\
248 IRQ_REG_ENTRY(OTG, reg_num,\
256 IRQ_REG_ENTRY(OTG, reg_num,\
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn21/
H A Dirq_service_dcn21.c244 IRQ_REG_ENTRY(OTG, reg_num,\
252 IRQ_REG_ENTRY(OTG, reg_num,\
260 IRQ_REG_ENTRY(OTG, reg_num,\
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn30/
H A Dirq_service_dcn30.c251 IRQ_REG_ENTRY(OTG, reg_num,\
259 IRQ_REG_ENTRY(OTG, reg_num,\
274 IRQ_REG_ENTRY(OTG, reg_num,\
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn315/
H A Dirq_service_dcn315.c246 IRQ_REG_ENTRY(OTG, reg_num,\
254 IRQ_REG_ENTRY(OTG, reg_num,\
262 IRQ_REG_ENTRY(OTG, reg_num,\
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn31/
H A Dirq_service_dcn31.c239 IRQ_REG_ENTRY(OTG, reg_num,\
247 IRQ_REG_ENTRY(OTG, reg_num,\
255 IRQ_REG_ENTRY(OTG, reg_num,\

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