Searched refs:MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 (Results 1 – 8 of 8) sorted by relevance
378 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x4001b0b5 /* PICO_P26 */518 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x130b0
334 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x100b1
406 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1b0b0
177 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1b0b1 /* FPGA_RESET# */
752 #define MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x264 0x634 0x000 0x5 0x0 macro
576 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1f0b0
129 #define MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x098 0x3ac 0x000 0x5 0x0 macro
484 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x0001b099