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Searched refs:MC_SEQ_WR_CTL_D1 (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dbtcd.h112 #define MC_SEQ_WR_CTL_D1 0x28c0 macro
H A Dbtc_dpm.c1851 case MC_SEQ_WR_CTL_D1 >> 2: in btc_check_s0_mc_reg_index()
2007 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in btc_initialize_mc_reg_table()
H A Dnid.h788 #define MC_SEQ_WR_CTL_D1 0x28c0 macro
H A Dsid.h549 #define MC_SEQ_WR_CTL_D1 0x28c0 macro
H A Dcikd.h662 #define MC_SEQ_WR_CTL_D1 0x28c0 macro
H A Devergreend.h294 #define MC_SEQ_WR_CTL_D1 0x28c0 macro
H A Dci_dpm.c4407 case MC_SEQ_WR_CTL_D1 >> 2: in ci_check_s0_mc_reg_index()
4525 case MC_SEQ_WR_CTL_D1: in ci_register_patching_mc_seq()
4606 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in ci_initialize_mc_reg_table()
H A Dni_dpm.c2797 case MC_SEQ_WR_CTL_D1 >> 2: in ni_check_s0_mc_reg_index()
2894 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in ni_initialize_mc_reg_table()
H A Dcypress_dpm.c1003 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_WR_CTL_D1 >> 2; in cypress_set_mc_reg_address_table()
H A Dsi_dpm.c5388 case MC_SEQ_WR_CTL_D1 >> 2: in si_check_s0_mc_reg_index()
5489 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in si_initialize_mc_reg_table()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsid.h550 #define MC_SEQ_WR_CTL_D1 0xA30 macro