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Searched refs:MC_SEQ_WR_CTL_D0_LP (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dbtcd.h151 #define MC_SEQ_WR_CTL_D0_LP 0x2a7c macro
H A Dbtc_dpm.c1849 *out_reg = MC_SEQ_WR_CTL_D0_LP >> 2; in btc_check_s0_mc_reg_index()
2006 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in btc_initialize_mc_reg_table()
H A Dnid.h809 #define MC_SEQ_WR_CTL_D0_LP 0x2a7c macro
H A Dsid.h577 #define MC_SEQ_WR_CTL_D0_LP 0x2a7c macro
H A Dcikd.h702 #define MC_SEQ_WR_CTL_D0_LP 0x2a7c macro
H A Devergreend.h327 #define MC_SEQ_WR_CTL_D0_LP 0x2a7c macro
H A Dni_dpm.c2795 *out_reg = MC_SEQ_WR_CTL_D0_LP >> 2; in ni_check_s0_mc_reg_index()
2893 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in ni_initialize_mc_reg_table()
H A Dcypress_dpm.c998 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_WR_CTL_D0_LP >> 2; in cypress_set_mc_reg_address_table()
H A Dci_dpm.c4405 *out_reg = MC_SEQ_WR_CTL_D0_LP >> 2; in ci_check_s0_mc_reg_index()
4605 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in ci_initialize_mc_reg_table()
H A Dsi_dpm.c5386 *out_reg = MC_SEQ_WR_CTL_D0_LP >> 2; in si_check_s0_mc_reg_index()
5488 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in si_initialize_mc_reg_table()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsid.h578 #define MC_SEQ_WR_CTL_D0_LP 0xA9F macro