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Searched refs:MC_SEQ_WR_CTL_D0 (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dbtcd.h111 #define MC_SEQ_WR_CTL_D0 0x28bc macro
H A Dbtc_dpm.c1848 case MC_SEQ_WR_CTL_D0 >> 2: in btc_check_s0_mc_reg_index()
2006 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in btc_initialize_mc_reg_table()
H A Dnid.h787 #define MC_SEQ_WR_CTL_D0 0x28bc macro
H A Dcikd.h661 #define MC_SEQ_WR_CTL_D0 0x28bc macro
H A Devergreend.h293 #define MC_SEQ_WR_CTL_D0 0x28bc macro
H A Dci_dpm.c4398 case MC_SEQ_WR_CTL_D0 >> 2: in ci_check_s0_mc_reg_index()
4510 case MC_SEQ_WR_CTL_D0: in ci_register_patching_mc_seq()
4599 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in ci_initialize_mc_reg_table()
H A Dni_dpm.c2794 case MC_SEQ_WR_CTL_D0 >> 2: in ni_check_s0_mc_reg_index()
2893 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in ni_initialize_mc_reg_table()
H A Dcypress_dpm.c999 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_WR_CTL_D0 >> 2; in cypress_set_mc_reg_address_table()
H A Dsi_dpm.c5392 case MC_SEQ_WR_CTL_D0 >> 2: in si_check_s0_mc_reg_index()
5495 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in si_initialize_mc_reg_table()
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c5967 case MC_SEQ_WR_CTL_D0: in si_check_s0_mc_reg_index()
6070 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in si_initialize_mc_reg_table()