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Searched refs:MC_SEQ_MISC0_GDDR5_MASK (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dbtcd.h121 #define MC_SEQ_MISC0_GDDR5_MASK 0xf0000000 macro
H A Dnid.h211 #define MC_SEQ_MISC0_GDDR5_MASK 0xf0000000 macro
792 #define MC_SEQ_MISC0_GDDR5_MASK 0xf0000000 macro
H A Drv770d.h287 #define MC_SEQ_MISC0_GDDR5_MASK 0xf0000000 macro
H A Dcikd.h684 #define MC_SEQ_MISC0_GDDR5_MASK 0xf0000000 macro
H A Dni.c652 mem_type = (RREG32(MC_SEQ_MISC0) & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT; in ni_mc_load_microcode()
H A Drv770_dpm.c1598 if (((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT) == in rv770_get_memory_type()
H A Dsi_dpm.c3155 …is_memory_gddr5 = (MC_SEQ_MISC0_GDDR5_VALUE == ((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GD… in si_is_special_1gb_platform()
H A Dci_dpm.c5047 if (((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT) == in ci_get_memory_type()
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_hwmgr.c80 #define MC_SEQ_MISC0_GDDR5_MASK 0xf0000000 macro
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c3725 …is_memory_gddr5 = (MC_SEQ_MISC0_GDDR5_VALUE == ((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GD… in si_is_special_1gb_platform()