| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | pllnv04.c | 151 int M1, N1, M2, N2, log2P; in getMNP_double() local
177 for (M2 = minM2; M2 <= maxM2; M2++) { in getMNP_double()
178 if (calcclk1/M2 < minU2) in getMNP_double()
180 if (calcclk1/M2 > maxU2) in getMNP_double()
184 N2 = (clkP * M2 + calcclk1/2) / calcclk1; in getMNP_double()
192 if (N2/M2 < 4 || N2/M2 > 10) in getMNP_double()
195 calcclk2 = calcclk1 * N2 / M2; in getMNP_double()
214 *pM2 = M2; in getMNP_double()
228 int *N1, int *M1, int *N2, int *M2, int *P) in nv04_pll_calc() argument
236 *M2 = 1; in nv04_pll_calc()
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| H A D | nv40.c | 62 int M2 = (coef & 0x00ff0000) >> 16; in read_pll_2() local
71 if (M2) in read_pll_2()
72 khz = khz * N2 / M2; in read_pll_2()
125 int *N1, int *M1, int *N2, int *M2, int *log2P) in nv40_clk_calc_pll() argument
138 ret = nv04_pll_calc(subdev, &pll, khz, N1, M1, N2, M2, log2P); in nv40_clk_calc_pll()
151 int N1, M1, N2, M2, log2P; in nv40_clk_calc() local
156 &N1, &M1, &N2, &M2, &log2P); in nv40_clk_calc()
160 if (N2 == M2) { in nv40_clk_calc()
165 clk->npll_coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_clk_calc()
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| H A D | nv04.c | 35 int N1, M1, N2, M2, P; in nv04_clk_pll_calc() local
36 int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P); in nv04_clk_pll_calc()
42 pv->M2 = M2; in nv04_clk_pll_calc()
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| H A D | nv50.c | 166 int N1, N2, M1, M2; in read_pll() local
175 M2 = (coef & 0x00ff0000) >> 16; in read_pll()
181 if (M2) in read_pll()
182 freq = freq * N2 / M2; in read_pll()
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| H A D | pll.h | 9 int *N1, int *M1, int *N2, int *M2, int *P);
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| /linux/Documentation/i2c/ |
| H A D | i2c-topology.rst | 201 '--------' | | mux M1 |--. | mux M2 |--. .--------.
209 and specifically when M2 requests its parent to lock, M1 passes
212 This topology is bad if M2 is an auto-closing mux and M1->select
214 through and be seen by the M2 adapter, thus closing M2 prematurely.
225 '--------' | | mux M1 |--. | mux M2 |--. .--------.
248 '--------' | | mux M1 |--. | mux M2 |--. .--------.
260 be avoided. The reason is that M2 probably assumes that there will
262 if there are, any such transfers might appear on the slave side of M2
266 The topology is especially troublesome if M2 is an auto-closing
267 mux. In that case, any interleaved accesses to D4 might close M2
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mm-data-modul-edm-sbc.dts | 226 "", "M2-B_PCIE_RST#", "M2-B_PCIE_WAKE#", "RTC_IRQ#",
227 "WDOG_KICK#", "M2-B_PCIE_CLKREQ#",
237 "M2-B_FULL_CARD_PWROFF_1V8#", "EEPROM_WP_1V8#",
240 "M2-B_W_DISABLE1_WWAN_1V8#", "M2-B_W_DISABLE2_GPS_1V8#",
252 "", "", "", "M2-B_WAKE_WWAN_1V8#",
253 "M2-B_RESET_1V8#", "", "", "",
708 /* M2-B_RESET_1V8# */
710 /* M2-B_PCIE_RST# */
712 /* M2-B_FULL_CARD_PWROFF_1V8# */
714 /* M2-B_W_DISABLE1_WWAN_1V8# */
[all …]
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
| H A D | nv04.c | 210 bool single_stage = !pv->NM2 || pv->N2 == pv->M2; /* nv41+ only */ in setPLL_double_highregs()
217 (pv->N2 & 0x7) << 19 | 8 << 4 | (pv->M2 & 7) << 4; in setPLL_double_highregs()
296 bool single_stage = !pv->NM2 || pv->N2 == pv->M2; in setPLL_double_lowregs()
363 int N1, M1, N2, M2, P; in nv04_devinit_pll_set() local
370 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P); in nv04_devinit_pll_set()
378 pv.M2 = M2; in nv04_devinit_pll_set()
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| H A D | nv50.c | 41 int N1, M1, N2, M2, P; in nv50_devinit_pll_set() local
50 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P); in nv50_devinit_pll_set()
62 (M2 << 16) | N2); in nv50_devinit_pll_set()
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| /linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am642-hummingboard-t.dts | 83 * - select: 0 = USB-3 (M2); 1 = PCIE (M1)
237 /* connector M2 RESET */
239 /* connectors M1 & M2 W_DISABLE1 */
241 /* connectors M1 & M2 W_DISABLE2 */
243 /* connectors M1 & M2 PERST0 (PCI Reset) */
247 /* connector M2 CLKREQ0 */
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| H A D | ramnv40.c | 40 int N1, M1, N2, M2; in nv40_ram_calc() local
49 ret = nv04_pll_calc(subdev, &pll, freq, &N1, &M1, &N2, &M2, &log2P); in nv40_ram_calc()
55 if (N2 == M2) { in nv40_ram_calc()
60 ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_ram_calc()
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| /linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ |
| H A D | pll.h | 9 uint8_t N1, M1, N2, M2; member
11 uint8_t M1, N1, M2, N2;
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| /linux/lib/crypto/arm64/ |
| H A D | polyval-ce-core.S | 40 M2 .req v2 label
223 ld1 {M0.16b, M1.16b, M2.16b, M3.16b}, [MSG], #64
251 karatsuba1 M2 KEY6
278 ld1 {M0.16b, M1.16b, M2.16b, M3.16b}, [MSG], #64
282 karatsuba1 M2 KEY6
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| /linux/arch/xtensa/variants/dc232b/include/variant/ |
| H A D | tie-asm.h | 53 rsr \at1, M2
96 wsr \at1, M2
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| /linux/arch/xtensa/variants/de212/include/variant/ |
| H A D | tie-asm.h | 99 rsr.M2 \at1 // MAC16 option
154 wsr.M2 \at1 // MAC16 option
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| /linux/Documentation/hwmon/ |
| H A D | ibmaem.rst | 11 This includes the x3350, x3550, x3650, x3655, x3755, x3850 M2,
12 x3950 M2, and certain HC10/HS2x/LS2x/QS2x blades.
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| /linux/arch/xtensa/variants/csp/include/variant/ |
| H A D | tie-asm.h | 111 rsr.M2 \at1 // MAC16 option
178 wsr.M2 \at1 // MAC16 option
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| /linux/arch/xtensa/variants/dc233c/include/variant/ |
| H A D | tie-asm.h | 108 rsr \at1, M2 // MAC16 option
173 wsr \at1, M2 // MAC16 option
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| /linux/tools/perf/util/ |
| H A D | stat.h | 17 double n, mean, M2; member
124 stats->M2 = 0.0; in init_stats()
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| /linux/lib/crypto/x86/ |
| H A D | poly1305-x86_64-cryptogams.pl | 2208 my ($M0,$M1,$M2,$M3,$M4) = map("%zmm$_",(25..29));
2299 vpmuludq $T1,$R1,$M2
2305 vpaddq $M2,$D2,$D2 # d2 += r1'*r1
2313 vpmuludq $T2,$R0,$M2
2319 vpaddq $M2,$D2,$D2 # d2 += r2'*r0
2325 vpmuludq $T3,$S4,$M2
2330 vpaddq $M2,$D2,$D2 # d2 += r3'*5*r4
2336 vpmuludq $T4,$S3,$M2
2341 vpaddq $M2,$D2,$D2 # d2 += r2'*5*r3
2371 vpsrlq \$26,$D2,$M2
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| /linux/arch/arm64/boot/dts/allwinner/ |
| H A D | sun50i-h5-bananapi-m2-plus.dts | 9 model = "Banana Pi BPI-M2-Plus H5";
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| H A D | sun50i-h5-bananapi-m2-plus-v1.2.dts | 10 model = "Banana Pi BPI-M2-Plus v1.2 H5";
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| /linux/arch/arm/boot/dts/allwinner/ |
| H A D | sun8i-h3-bananapi-m2-plus-v1.2.dts | 11 model = "Banana Pi BPI-M2-Plus v1.2 H3";
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| H A D | sunxi-bananapi-m2-plus-v1.2.dtsi | 10 * Bananapi M2+ v1.2 uses a GPIO line to change the effective
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| /linux/arch/arm64/boot/dts/apple/ |
| H A D | spi1-nvram.dtsi | 6 // M2* devices.
|