Home
last modified time | relevance | path

Searched refs:INVALIDATE_L2_CACHE (Results 1 – 25 of 28) sorted by relevance

12

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfxhub_v3_0_3.c235 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in gfxhub_v3_0_3_init_cache_regs()
H A Dgfxhub_v2_0.c229 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in gfxhub_v2_0_init_cache_regs()
H A Dgfxhub_v1_0.c192 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in gfxhub_v1_0_init_cache_regs()
H A Dgfxhub_v11_5_0.c233 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in gfxhub_v11_5_0_init_cache_regs()
H A Dmmhub_v3_0_2.c248 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in mmhub_v3_0_2_init_cache_regs()
H A Dgfxhub_v3_0.c230 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in gfxhub_v3_0_init_cache_regs()
H A Dgfxhub_v12_0.c238 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in gfxhub_v12_0_init_cache_regs()
H A Dmmhub_v3_0_1.c249 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in mmhub_v3_0_1_init_cache_regs()
H A Dmmhub_v3_0.c256 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in mmhub_v3_0_init_cache_regs()
H A Dmmhub_v2_3.c224 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in mmhub_v2_3_init_cache_regs()
H A Dmmhub_v2_0.c300 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in mmhub_v2_0_init_cache_regs()
H A Dmmhub_v3_3.c245 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in mmhub_v3_3_init_cache_regs()
H A Dmmhub_v4_1_0.c257 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in mmhub_v4_1_0_init_cache_regs()
H A Dgfxhub_v1_2.c241 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in gfxhub_v1_2_xcc_init_cache_regs()
H A Dmmhub_v1_8.c246 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in mmhub_v1_8_init_cache_regs()
H A Dgfxhub_v2_1.c235 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in gfxhub_v2_1_init_cache_regs()
H A Dmmhub_v1_7.c196 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in mmhub_v1_7_init_cache_regs()
H A Dsid.h381 #define INVALIDATE_L2_CACHE (1 << 1) macro
H A Dmmhub_v9_4.c229 INVALIDATE_L2_CACHE, 1); in mmhub_v9_4_init_cache_regs()
/linux/drivers/gpu/drm/radeon/
H A Drv770d.h649 #define INVALIDATE_L2_CACHE (1 << 1) macro
H A Dnid.h119 #define INVALIDATE_L2_CACHE (1 << 1) macro
H A Dsid.h380 #define INVALIDATE_L2_CACHE (1 << 1) macro
H A Dcikd.h498 #define INVALIDATE_L2_CACHE (1 << 1) macro
H A Devergreend.h1157 #define INVALIDATE_L2_CACHE (1 << 1) macro
H A Dr600d.h594 #define INVALIDATE_L2_CACHE (1 << 1) macro

12