Home
last modified time | relevance | path

Searched refs:INVALIDATE_ALL_L1_TLBS (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfxhub_v2_0.c228 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gfxhub_v2_0_init_cache_regs()
H A Dgfxhub_v1_0.c191 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gfxhub_v1_0_init_cache_regs()
H A Dmmhub_v2_0.c284 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in mmhub_v2_0_init_cache_regs()
H A Dmmhub_v2_3.c214 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in mmhub_v2_3_init_cache_regs()
H A Dgfxhub_v2_1.c234 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gfxhub_v2_1_init_cache_regs()
H A Dgfxhub_v1_2.c242 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gfxhub_v1_2_xcc_init_cache_regs()
H A Dmmhub_v1_0.c177 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in mmhub_v1_0_init_cache_regs()
H A Dgfxhub_v12_1.c316 INVALIDATE_ALL_L1_TLBS, 1); in gfxhub_v12_1_xcc_init_cache_regs()
/linux/drivers/gpu/drm/radeon/
H A Drv770d.h648 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
H A Dnid.h118 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
H A Dcikd.h497 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
H A Devergreend.h1156 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
H A Dr600d.h593 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
H A Dni.c1274 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in cayman_pcie_gart_enable()