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Searched refs:INTEL_INFO (Results 1 – 23 of 23) sorted by relevance

/linux/drivers/gpu/drm/i915/
H A Di915_drv.h392 #define INTEL_INFO(i915) ((i915)->__info) macro
487 #define IS_MOBILE(i915) (INTEL_INFO(i915)->is_mobile)
488 #define IS_DGFX(i915) (INTEL_INFO(i915)->is_dgfx)
621 #define HAS_MEDIA_RATIO_MODE(i915) (INTEL_INFO(i915)->has_media_ratio_mode)
629 #define HAS_LLC(i915) (INTEL_INFO(i915)->has_llc)
630 #define HAS_SNOOP(i915) (INTEL_INFO(i915)->has_snoop)
635 #define HWS_NEEDS_PHYSICAL(i915) (INTEL_INFO(i915)->hws_needs_physical)
638 (INTEL_INFO(i915)->has_logical_ring_contexts)
640 (INTEL_INFO(i915)->has_logical_ring_elsq)
660 (IS_SKYLAKE(i915) && (INTEL_INFO(i915)->gt == 3 || INTEL_INFO(i915)->gt == 4))
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H A Dintel_device_info.c227 const struct intel_device_info *info = INTEL_INFO(i915); in intel_device_info_subplatform_init()
343 INTEL_INFO(i915)->platform == INTEL_METEORLAKE) { in intel_ipver_early_init()
409 memcpy(runtime, &INTEL_INFO(i915)->__runtime, sizeof(*runtime)); in intel_device_info_driver_create()
H A Di915_driver.c199 if (!INTEL_INFO(i915)->gpu_reset_clobbers_display) { in sanitize_gpu()
376 unsigned int mask_size = INTEL_INFO(i915)->dma_mask_size; in i915_set_dma_info()
693 intel_platform_name(INTEL_INFO(dev_priv)->platform), in i915_welcome_messages()
695 INTEL_INFO(dev_priv)->platform), in i915_welcome_messages()
698 intel_device_info_print(INTEL_INFO(dev_priv), in i915_welcome_messages()
H A Di915_getparam.c190 value = INTEL_INFO(i915)->has_coherent_ggtt; in i915_getparam_ioctl()
H A Di915_debugfs.c71 intel_device_info_print(INTEL_INFO(i915), RUNTIME_INFO(i915), &p); in i915_capabilities()
H A Di915_perf.c4959 enum intel_platform platform = INTEL_INFO(i915)->platform; in oa_init_supported_formats()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_reset.c18 return (INTEL_INFO(dev_priv)->gpu_reset_clobbers_display && in gpu_reset_clobbers_display()
H A Dintel_ddi_buf_trans.c1756 MISSING_CASE(INTEL_INFO(i915)->platform); in intel_ddi_buf_trans_init()
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_reset.c811 return INTEL_INFO(gt->i915)->has_reset_engine; in intel_has_reset_engine()
989 if (!INTEL_INFO(gt->i915)->gpu_reset_clobbers_display) in __intel_gt_set_wedged()
1109 if (!INTEL_INFO(gt->i915)->gpu_reset_clobbers_display) in __intel_gt_unset_wedged()
1235 if (INTEL_INFO(gt->i915)->gpu_reset_clobbers_display) in intel_gt_reset()
1243 if (INTEL_INFO(gt->i915)->gpu_reset_clobbers_display) in intel_gt_reset()
H A Dintel_gt_mcr.c38 #define HAS_MSLICE_STEERING(i915) (INTEL_INFO(i915)->has_mslice_steering)
176 MISSING_CASE(INTEL_INFO(i915)->platform); in intel_gt_mcr_init()
H A Dintel_gt_pm.c159 if (INTEL_INFO(gt->i915)->gpu_reset_clobbers_display) in reset_engines()
H A Dintel_sseu.c581 switch (INTEL_INFO(i915)->gt) { in hsw_sseu_info_init()
583 MISSING_CASE(INTEL_INFO(i915)->gt); in hsw_sseu_info_init()
H A Dintel_workarounds.c421 (INTEL_INFO(i915)->gt == 3 ? HDC_FENCE_DEST_SLM_DISABLE : 0)); in bdw_ctx_workarounds_init()
2549 if (INTEL_INFO(i915)->gt == 1) in rcs_engine_wa_init()
2727 if (INTEL_INFO(i915)->tuning_thread_rr_after_dep) in add_render_compute_tuning_settings()
H A Dselftest_workarounds.c420 enum intel_platform platform = INTEL_INFO(engine->i915)->platform; in wo_register()
H A Dintel_engine_cs.c680 if (!INTEL_INFO(gt->i915)->gpu_reset_clobbers_display) in intel_engines_release()
H A Dintel_rps.c381 if (INTEL_INFO(i915)->is_mobile) in pvid_to_extvid()
/linux/drivers/gpu/drm/xe/compat-i915-headers/
H A Di915_drv.h26 #define INTEL_INFO(dev_priv) (&((dev_priv)->info)) macro
/linux/drivers/gpu/drm/i915/selftests/
H A Dintel_uncore.c196 intel_platform_name(INTEL_INFO(gt->i915)->platform)); in live_forcewake_ops()
/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_gsc_uc.c111 mask = INTEL_INFO(gt->i915)->platform_engine_mask; in gsc_engine_supported()
H A Dintel_uc_fw.c287 enum intel_platform p = INTEL_INFO(i915)->platform; in __uc_fw_auto_select()
/linux/drivers/gpu/drm/i915/gem/
H A Di915_gem_create.c415 max_pat_index = INTEL_INFO(i915)->max_pat_index; in ext_set_pat()
H A Di915_gem_object.c55 return INTEL_INFO(i915)->cachelevel_to_pat[level]; in i915_gem_get_pat_index()
H A Di915_gem_execbuffer.c1128 cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment; in reloc_cache_init()