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Searched refs:IMX8MP_VIDEO_PLL1 (Results 1 – 9 of 9) sorted by relevance

/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-phyboard-pollux-etml1010g3dra.dtso26 assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, <&clk IMX8MP_VIDEO_PLL1>;
29 * The LVDS panel uses 72.4 MHz pixel clock, set IMX8MP_VIDEO_PLL1 to
H A Dimx8mp-phyboard-pollux-ph128800t006.dtso26 assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, <&clk IMX8MP_VIDEO_PLL1>;
29 * The LVDS panel uses 72.4 MHz pixel clock, set IMX8MP_VIDEO_PLL1 to
H A Dimx8mp-phyboard-pollux-peb-av-10-ph128800t006.dtso27 assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, <&clk IMX8MP_VIDEO_PLL1>;
30 * The LVDS panel uses 66.5 MHz pixel clock, set IMX8MP_VIDEO_PLL1 to
H A Dimx8mp-phyboard-pollux-peb-av-10-etml1010g3dra.dtso27 assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, <&clk IMX8MP_VIDEO_PLL1>;
30 * The LVDS panel uses 72.4 MHz pixel clock, set IMX8MP_VIDEO_PLL1 to
H A Dimx8mp-skov-revb-mi1010ait-1cp1.dts53 <&clk IMX8MP_VIDEO_PLL1>;
55 /* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_DISP2_PIX * 2 * 7 */
H A Dimx8mp-skov-revc-tian-g07017.dts53 <&clk IMX8MP_VIDEO_PLL1>;
55 /* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_DISP2_PIX * 2 * 7 */
H A Dimx8mp-skov-revc-jutouch-jt101tm023.dts51 <&clk IMX8MP_VIDEO_PLL1>;
53 /* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_DISP2_PIX * 7 */
H A Dimx8mp-nominal.dtsi81 <&clk IMX8MP_VIDEO_PLL1>;
/linux/include/dt-bindings/clock/
H A Dimx8mp-clock.h29 #define IMX8MP_VIDEO_PLL1 20 macro