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Searched refs:GRBM_SOFT_RESET (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dni.c1639 WREG32(GRBM_SOFT_RESET, (SOFT_RESET_CP | in cayman_cp_resume()
1645 RREG32(GRBM_SOFT_RESET); in cayman_cp_resume()
1647 WREG32(GRBM_SOFT_RESET, 0); in cayman_cp_resume()
1648 RREG32(GRBM_SOFT_RESET); in cayman_cp_resume()
1894 tmp = RREG32(GRBM_SOFT_RESET); in cayman_gpu_soft_reset()
1897 WREG32(GRBM_SOFT_RESET, tmp); in cayman_gpu_soft_reset()
1898 tmp = RREG32(GRBM_SOFT_RESET); in cayman_gpu_soft_reset()
1903 WREG32(GRBM_SOFT_RESET, tmp); in cayman_gpu_soft_reset()
1904 tmp = RREG32(GRBM_SOFT_RESET); in cayman_gpu_soft_reset()
H A Drv770.c1105 WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); in rv770_cp_load_microcode()
1106 RREG32(GRBM_SOFT_RESET); in rv770_cp_load_microcode()
1108 WREG32(GRBM_SOFT_RESET, 0); in rv770_cp_load_microcode()
H A Devergreen.c3075 WREG32(GRBM_SOFT_RESET, (SOFT_RESET_CP | in evergreen_cp_resume()
3081 RREG32(GRBM_SOFT_RESET); in evergreen_cp_resume()
3083 WREG32(GRBM_SOFT_RESET, 0); in evergreen_cp_resume()
3084 RREG32(GRBM_SOFT_RESET); in evergreen_cp_resume()
3978 tmp = RREG32(GRBM_SOFT_RESET); in evergreen_gpu_soft_reset()
3980 dev_info(rdev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); in evergreen_gpu_soft_reset()
3981 WREG32(GRBM_SOFT_RESET, tmp); in evergreen_gpu_soft_reset()
3982 tmp = RREG32(GRBM_SOFT_RESET); in evergreen_gpu_soft_reset()
3987 WREG32(GRBM_SOFT_RESET, tmp); in evergreen_gpu_soft_reset()
3988 tmp = RREG32(GRBM_SOFT_RESET); in evergreen_gpu_soft_reset()
[all...]
H A Dr600.c2661 WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); in r600_cp_load_microcode()
2662 RREG32(GRBM_SOFT_RESET); in r600_cp_load_microcode()
2664 WREG32(GRBM_SOFT_RESET, 0); in r600_cp_load_microcode()
2724 WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); in r600_cp_resume()
2725 RREG32(GRBM_SOFT_RESET); in r600_cp_resume()
2727 WREG32(GRBM_SOFT_RESET, 0); in r600_cp_resume()
H A Drv770d.h401 #define GRBM_SOFT_RESET 0x8020 macro
H A Dnid.h280 #define GRBM_SOFT_RESET 0x8020 macro
H A Dcikd.h1075 #define GRBM_SOFT_RESET 0x8020 macro
H A Devergreend.h828 #define GRBM_SOFT_RESET 0x8020 macro
H A Dr600d.h295 #define GRBM_SOFT_RESET 0x8020 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c2269 WREG32_FIELD15_PREREG(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v11_0_rlc_smu_handshake_cntl()
2271 WREG32_FIELD15_PREREG(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); in gfx_v11_0_rlc_smu_handshake_cntl()
5086 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, in gfx_v11_0_soft_reset()
5088 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, in gfx_v11_0_soft_reset()
5090 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, in gfx_v11_0_soft_reset()
5092 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, in gfx_v11_0_soft_reset()
5094 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, in gfx_v11_0_soft_reset()
5099 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, in gfx_v11_0_soft_reset()
5101 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, in gfx_v11_0_soft_reset()
5103 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, in gfx_v11_0_soft_reset()
[all...]
H A Dgfx_v10_0.c5479 WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v10_0_rlc_reset()
5481 WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); in gfx_v10_0_rlc_reset()
7624 GRBM_SOFT_RESET, SOFT_RESET_CP, in gfx_v10_0_soft_reset()
7627 GRBM_SOFT_RESET, SOFT_RESET_GFX, in gfx_v10_0_soft_reset()
7633 GRBM_SOFT_RESET, SOFT_RESET_CP, in gfx_v10_0_soft_reset()
7649 GRBM_SOFT_RESET, in gfx_v10_0_soft_reset()
7656 GRBM_SOFT_RESET, in gfx_v10_0_soft_reset()
7674 dev_info(adev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); in gfx_v10_0_soft_reset()
H A Dgfx_v6_0.c2481 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v6_0_rlc_reset()
2483 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); in gfx_v6_0_rlc_reset()
H A Dgfx_v12_0.c1928 WREG32_FIELD15_PREREG(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v12_0_rlc_smu_handshake_cntl()
1930 WREG32_FIELD15_PREREG(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); in gfx_v12_0_rlc_smu_handshake_cntl()