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Searched refs:GRBM_GFX_INDEX (Results 1 – 24 of 24) sorted by relevance

/linux/drivers/gpu/drm/amd/amdkfd/
H A Dcik_regs.h69 #define GRBM_GFX_INDEX 0x30800 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v12.c175 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in wave_control_execute_v12()
177 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in wave_control_execute_v12()
179 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in wave_control_execute_v12()
H A Damdgpu_amdkfd_gfx_v12_1.c178 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in wave_control_execute_v12_1()
180 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in wave_control_execute_v12_1()
182 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in wave_control_execute_v12_1()
H A Damdgpu_amdkfd_gfx_v8.c553 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_wave_control_execute()
555 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_wave_control_execute()
557 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_wave_control_execute()
H A Damdgpu_amdkfd_gfx_v10_3.c600 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in wave_control_execute_v10_3()
602 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in wave_control_execute_v10_3()
604 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in wave_control_execute_v10_3()
H A Damdgpu_amdkfd_gfx_v11.c586 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in wave_control_execute_v11()
588 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in wave_control_execute_v11()
590 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in wave_control_execute_v11()
H A Damdgpu_amdkfd_gfx_v10.c688 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_wave_control_execute()
690 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_wave_control_execute()
692 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_wave_control_execute()
H A Damdgpu_amdkfd_gfx_v9.c638 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_gfx_v9_wave_control_execute()
640 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_gfx_v9_wave_control_execute()
642 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_gfx_v9_wave_control_execute()
H A Dgfx_v9_4_3.c694 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, in gfx_v9_4_3_xcc_select_se_sh()
697 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, in gfx_v9_4_3_xcc_select_se_sh()
701 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in gfx_v9_4_3_xcc_select_se_sh()
704 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v9_4_3_xcc_select_se_sh()
707 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in gfx_v9_4_3_xcc_select_se_sh()
710 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); in gfx_v9_4_3_xcc_select_se_sh()
H A Dgfx_v12_1.c1614 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, in gfx_v12_1_xcc_select_se_sh()
1617 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_INDEX, in gfx_v12_1_xcc_select_se_sh()
1621 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, in gfx_v12_1_xcc_select_se_sh()
1624 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v12_1_xcc_select_se_sh()
1627 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SA_BROADCAST_WRITES, in gfx_v12_1_xcc_select_se_sh()
1630 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SA_INDEX, sh_num); in gfx_v12_1_xcc_select_se_sh()
H A Dvce_v3_0.c787 WREG32_FIELD(GRBM_GFX_INDEX, VCE_INSTANCE, 0); in vce_v3_0_get_clockgating_state()
H A Dgfx_v12_0.c1691 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, in gfx_v12_0_select_se_sh()
1694 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_INDEX, in gfx_v12_0_select_se_sh()
1698 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, in gfx_v12_0_select_se_sh()
1701 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v12_0_select_se_sh()
1704 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SA_BROADCAST_WRITES, in gfx_v12_0_select_se_sh()
1707 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SA_INDEX, sh_num); in gfx_v12_0_select_se_sh()
H A Dgfx_v8_0.c3407 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v8_0_select_se_sh()
3409 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_INDEX, instance); in gfx_v8_0_select_se_sh()
3412 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, 1); in gfx_v8_0_select_se_sh()
3414 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v8_0_select_se_sh()
3417 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_BROADCAST_WRITES, 1); in gfx_v8_0_select_se_sh()
3419 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); in gfx_v8_0_select_se_sh()
H A Dgfx_v9_0.c2509 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v9_0_select_se_sh()
2511 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_INDEX, instance); in gfx_v9_0_select_se_sh()
2514 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, 1); in gfx_v9_0_select_se_sh()
2516 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v9_0_select_se_sh()
2519 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_BROADCAST_WRITES, 1); in gfx_v9_0_select_se_sh()
2521 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); in gfx_v9_0_select_se_sh()
H A Dgfx_v11_0.c2016 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, in gfx_v11_0_select_se_sh()
2019 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_INDEX, in gfx_v11_0_select_se_sh()
2023 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, in gfx_v11_0_select_se_sh()
2026 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v11_0_select_se_sh()
2029 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SA_BROADCAST_WRITES, in gfx_v11_0_select_se_sh()
2032 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SA_INDEX, sh_num); in gfx_v11_0_select_se_sh()
H A Dgfx_v10_0.c5064 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, in gfx_v10_0_select_se_sh()
5067 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_INDEX, in gfx_v10_0_select_se_sh()
5071 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, in gfx_v10_0_select_se_sh()
5074 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v10_0_select_se_sh()
5077 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SA_BROADCAST_WRITES, in gfx_v10_0_select_se_sh()
5080 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SA_INDEX, sh_num); in gfx_v10_0_select_se_sh()
/linux/drivers/gpu/drm/radeon/
H A Dcypress_dpm.c125 WREG32(GRBM_GFX_INDEX, 0xC0000000); in cypress_gfx_clock_gating_enable()
152 WREG32(GRBM_GFX_INDEX, 0xC0000000); in cypress_gfx_clock_gating_enable()
186 WREG32(GRBM_GFX_INDEX, 0xC0000000); in cypress_mg_clock_gating_enable()
207 WREG32(GRBM_GFX_INDEX, 0xC0000000); in cypress_mg_clock_gating_enable()
H A Dni.c1069 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1089 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1098 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in cayman_gpu_init()
H A Dnid.h295 #define GRBM_GFX_INDEX 0x802C macro
H A Dcikd.h1627 #define GRBM_GFX_INDEX 0x30800 macro
H A Devergreend.h412 #define GRBM_GFX_INDEX 0x802C macro
H A Devergreen_cs.c3328 case GRBM_GFX_INDEX: in evergreen_vm_reg_valid()
/linux/drivers/gpu/drm/radeon/reg_srcs/
H A Devergreen2 0x0000802C GRBM_GFX_INDEX
H A Dcayman2 0x0000802C GRBM_GFX_INDEX