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Searched refs:GCC_PCIE0_PHY_BCR (Results 1 – 11 of 11) sorted by relevance

/linux/include/dt-bindings/reset/
H A Dqcom,gcc-ipq5018.h44 #define GCC_PCIE0_PHY_BCR 35 macro
H A Dqcom,gcc-ipq6018.h78 #define GCC_PCIE0_PHY_BCR 69 macro
H A Dqcom,ipq9574-gcc.h30 #define GCC_PCIE0_PHY_BCR 21 macro
H A Dqcom,ipq5424-gcc.h35 #define GCC_PCIE0_PHY_BCR 26 macro
/linux/include/dt-bindings/clock/
H A Dqcom,gcc-ipq8074.h316 #define GCC_PCIE0_PHY_BCR 78 macro
/linux/arch/arm64/boot/dts/qcom/
H A Dipq6018.dtsi303 resets = <&gcc GCC_PCIE0_PHY_BCR>,
/linux/drivers/clk/qcom/
H A Dgcc-ipq5424.c2957 [GCC_PCIE0_PHY_BCR] = { 0x28060, 0 },
H A Dgcc-ipq5018.c3587 [GCC_PCIE0_PHY_BCR] = { 0x75038, 0 },
H A Dgcc-ipq9574.c3985 [GCC_PCIE0_PHY_BCR] = { 0x28060, 0 },
H A Dgcc-ipq6018.c4518 [GCC_PCIE0_PHY_BCR] = { 0x75038, 0 },
H A Dgcc-ipq8074.c4647 [GCC_PCIE0_PHY_BCR] = { 0x75038, 0 },