Searched refs:EVENT_INDEX (Results 1 – 9 of 9) sorted by relevance
228 #define EVENT_INDEX(x) ((x) << 8) macro
4717 ib.ptr[ib.length_dw++] = EVENT_TYPE(7) | EVENT_INDEX(4); in gfx_v9_0_do_edc_gpr_workarounds()4745 ib.ptr[ib.length_dw++] = EVENT_TYPE(7) | EVENT_INDEX(4); in gfx_v9_0_do_edc_gpr_workarounds()4773 ib.ptr[ib.length_dw++] = EVENT_TYPE(7) | EVENT_INDEX(4); in gfx_v9_0_do_edc_gpr_workarounds()5555 EVENT_INDEX(5); in gfx_v9_0_ring_emit_fence()5583 EVENT_INDEX(event_index)); in gfx_v9_0_ring_emit_event_write()
1888 EVENT_INDEX(0)); in gfx_v6_0_ring_emit_vgt_flush()1910 amdgpu_ring_write(ring, EVENT_TYPE(CACHE_FLUSH_AND_INV_TS_EVENT) | EVENT_INDEX(5)); in gfx_v6_0_ring_emit_fence()
71 #define EVENT_INDEX RESET_COMPLETE macro173 #define CCG_EVENT_MAX (EVENT_INDEX + 43)751 return (code >= CCG_EVENT_MAX) || (code < EVENT_INDEX); in invalid_async_evt()
1240 #define EVENT_INDEX(x) ((x) << 8) macro
1814 #define EVENT_INDEX(x) ((x) << 8) macro
1665 #define EVENT_INDEX(x) ((x) << 8) macro
1392 radeon_ring_write(ring, EVENT_TYPE(CACHE_FLUSH_AND_INV_EVENT_TS) | EVENT_INDEX(5)); in cayman_fence_ring_emit()
2887 radeon_ring_write(ring, EVENT_TYPE(CACHE_FLUSH_AND_INV_EVENT_TS) | EVENT_INDEX(5)); in r600_fence_ring_emit()2900 radeon_ring_write(ring, EVENT_TYPE(CACHE_FLUSH_AND_INV_EVENT) | EVENT_INDEX(0)); in r600_fence_ring_emit()