| /linux/drivers/gpu/drm/radeon/ |
| H A D | rv770.c | 907 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | in rv770_pcie_gart_enable()
954 WREG32(VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING | in rv770_pcie_gart_disable()
984 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | in rv770_agp_enable()
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| H A D | rv770d.h | 644 #define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1) macro
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| H A D | nid.h | 106 #define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1) macro
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| H A D | sid.h | 371 #define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1) macro
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| H A D | cikd.h | 489 #define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1) macro
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| H A D | r600.c | 1142 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | in r600_pcie_gart_enable()
1196 WREG32(VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING | in r600_pcie_gart_disable()
1234 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | in r600_agp_enable()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfxhub_v3_0_3.c | 222 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in gfxhub_v3_0_3_init_cache_regs()
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| H A D | gfxhub_v2_0.c | 216 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in gfxhub_v2_0_init_cache_regs()
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| H A D | gfxhub_v1_0.c | 181 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1); in gfxhub_v1_0_init_cache_regs()
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| H A D | gfxhub_v11_5_0.c | 220 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in gfxhub_v11_5_0_init_cache_regs()
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| H A D | mmhub_v3_0_2.c | 235 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in mmhub_v3_0_2_init_cache_regs()
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| H A D | gfxhub_v3_0.c | 217 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in gfxhub_v3_0_init_cache_regs()
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| H A D | gfxhub_v12_0.c | 225 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in gfxhub_v12_0_init_cache_regs()
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| H A D | mmhub_v3_0_1.c | 236 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in mmhub_v3_0_1_init_cache_regs()
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| H A D | mmhub_v3_0.c | 243 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in mmhub_v3_0_init_cache_regs()
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| H A D | mmhub_v2_3.c | 211 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in mmhub_v2_3_init_cache_regs()
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| H A D | mmhub_v2_0.c | 287 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in mmhub_v2_0_init_cache_regs()
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| H A D | mmhub_v3_3.c | 232 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in mmhub_v3_3_init_cache_regs()
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| H A D | mmhub_v4_1_0.c | 244 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in mmhub_v4_1_0_init_cache_regs()
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| H A D | mmhub_v1_0.c | 167 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1); in mmhub_v1_0_init_cache_regs()
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| H A D | gfxhub_v1_2.c | 230 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1); in gfxhub_v1_2_xcc_init_cache_regs()
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| H A D | mmhub_v1_8.c | 231 ENABLE_L2_FRAGMENT_PROCESSING, 1); in mmhub_v1_8_init_cache_regs()
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| H A D | gfxhub_v2_1.c | 222 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in gfxhub_v2_1_init_cache_regs()
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| H A D | gmc_v7_0.c | 623 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1); in gmc_v7_0_gart_enable()
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| H A D | mmhub_v1_7.c | 185 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1); in mmhub_v1_7_init_cache_regs()
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