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Searched refs:ENABLE_CONTEXT (Results 1 – 24 of 24) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmmhub_v3_3.c379 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v3_3_enable_system_domain()
415 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in mmhub_v3_3_setup_vmid_config()
492 tmp = REG_SET_FIELD(tmp, MMVM_L2_SAW_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v3_3_init_saw_regs()
H A Dgfxhub_v3_0_3.c265 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v3_0_3_enable_system_domain()
303 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v3_0_3_setup_vmid_config()
H A Dgfxhub_v2_0.c259 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v2_0_enable_system_domain()
291 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v2_0_setup_vmid_config()
H A Dgfxhub_v11_5_0.c263 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v11_5_0_enable_system_domain()
301 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v11_5_0_setup_vmid_config()
H A Dmmhub_v3_0_2.c278 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v3_0_2_enable_system_domain()
319 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in mmhub_v3_0_2_setup_vmid_config()
H A Dgfxhub_v3_0.c260 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v3_0_enable_system_domain()
298 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v3_0_setup_vmid_config()
H A Dgfxhub_v12_0.c268 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v12_0_enable_system_domain()
306 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v12_0_setup_vmid_config()
H A Dmmhub_v3_0_1.c286 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v3_0_1_enable_system_domain()
321 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in mmhub_v3_0_1_setup_vmid_config()
H A Dmmhub_v3_0.c286 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v3_0_enable_system_domain()
327 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in mmhub_v3_0_setup_vmid_config()
H A Dmmhub_v2_3.c254 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v2_3_enable_system_domain()
289 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in mmhub_v2_3_setup_vmid_config()
H A Dmmhub_v2_0.c330 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v2_0_enable_system_domain()
371 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in mmhub_v2_0_setup_vmid_config()
H A Dmmhub_v4_1_0.c279 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v4_1_0_enable_system_domain()
320 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in mmhub_v4_1_0_setup_vmid_config()
H A Dmmhub_v1_0.c204 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v1_0_enable_system_domain()
294 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in mmhub_v1_0_setup_vmid_config()
H A Dgmc_v7_0.c661 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gmc_v7_0_gart_enable()
691 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in gmc_v7_0_gart_enable()
H A Dgmc_v8_0.c894 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gmc_v8_0_gart_enable()
924 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in gmc_v8_0_gart_enable()
/linux/drivers/gpu/drm/radeon/
H A Drv770d.h635 #define ENABLE_CONTEXT (1 << 0) macro
H A Dnid.h128 #define ENABLE_CONTEXT (1 << 0) macro
H A Dni.c1285 WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in cayman_pcie_gart_enable()
1309 WREG32(VM_CONTEXT1_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(1) | in cayman_pcie_gart_enable()
H A Dcikd.h511 #define ENABLE_CONTEXT (1 << 0) macro
H A Drv770.c929 WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in rv770_pcie_gart_enable()
H A Devergreend.h1137 #define ENABLE_CONTEXT (1 << 0) macro
H A Dr600d.h574 #define ENABLE_CONTEXT (1 << 0) macro
H A Dr600.c1171 WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in r600_pcie_gart_enable()
H A Devergreen.c2444 WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in evergreen_pcie_gart_enable()