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Searched refs:DCLK_VOP1 (Results 1 – 25 of 31) sorted by relevance

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/linux/include/dt-bindings/clock/
H A Drk3288-cru.h88 #define DCLK_VOP1 191 macro
H A Drockchip,rk3528-cru.h272 #define DCLK_VOP1 260 macro
H A Drk3399-cru.h130 #define DCLK_VOP1 181 macro
H A Drockchip,rk3588-cru.h625 #define DCLK_VOP1 610 macro
H A Drk3568-cru.h288 #define DCLK_VOP1 224 macro
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3566-radxa-zero-3.dtsi516 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-box-demo.dts468 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-lubancat-1.dts575 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3568-photonicat.dts569 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3568-nanopi-r5s.dtsi591 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-odroid-m1s.dts649 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3568-easepi-r1.dts609 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-lckfb-tspi.dts711 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3568-evb1-v10.dts729 assigned-clocks = <&cru DCLK_VOP0>, <&cru PLL_VPLL>, <&cru DCLK_VOP1>;
H A Drk3566-orangepi-3b.dtsi669 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-quartz64-b.dts731 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-anbernic-rgxx3.dtsi705 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3568-odroid-m1.dts729 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3568-9tripod-x3568-v4.dts866 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-powkiddy-rk2023.dtsi840 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-quartz64-a.dts830 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-bigtreetech-cb2.dtsi890 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3399-pinephone-pro.dts869 assigned-clocks = <&cru DCLK_VOP1_DIV>, <&cru DCLK_VOP1>,
H A Drk3566-pinetab2.dtsi923 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
/linux/drivers/clk/rockchip/
H A Dclk-rk3288.c448 COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0,

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