xref: /linux/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dtsi (revision a1c613ae4c322ddd58d5a8539dbfba2a0380a8c0)
1*c8ec73b0STianling Shen// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2*c8ec73b0STianling Shen/*
3*c8ec73b0STianling Shen * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
4*c8ec73b0STianling Shen * (http://www.friendlyelec.com)
5*c8ec73b0STianling Shen *
6*c8ec73b0STianling Shen * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
7*c8ec73b0STianling Shen */
8*c8ec73b0STianling Shen
9*c8ec73b0STianling Shen/dts-v1/;
10*c8ec73b0STianling Shen#include <dt-bindings/gpio/gpio.h>
11*c8ec73b0STianling Shen#include <dt-bindings/input/input.h>
12*c8ec73b0STianling Shen#include <dt-bindings/leds/common.h>
13*c8ec73b0STianling Shen#include <dt-bindings/pinctrl/rockchip.h>
14*c8ec73b0STianling Shen#include <dt-bindings/soc/rockchip,vop2.h>
15*c8ec73b0STianling Shen#include "rk3568.dtsi"
16*c8ec73b0STianling Shen
17*c8ec73b0STianling Shen/ {
18*c8ec73b0STianling Shen	aliases {
19*c8ec73b0STianling Shen		mmc0 = &sdmmc0;
20*c8ec73b0STianling Shen		mmc1 = &sdhci;
21*c8ec73b0STianling Shen	};
22*c8ec73b0STianling Shen
23*c8ec73b0STianling Shen	chosen: chosen {
24*c8ec73b0STianling Shen		stdout-path = "serial2:1500000n8";
25*c8ec73b0STianling Shen	};
26*c8ec73b0STianling Shen
27*c8ec73b0STianling Shen	hdmi-con {
28*c8ec73b0STianling Shen		compatible = "hdmi-connector";
29*c8ec73b0STianling Shen		type = "a";
30*c8ec73b0STianling Shen
31*c8ec73b0STianling Shen		port {
32*c8ec73b0STianling Shen			hdmi_con_in: endpoint {
33*c8ec73b0STianling Shen				remote-endpoint = <&hdmi_out_con>;
34*c8ec73b0STianling Shen			};
35*c8ec73b0STianling Shen		};
36*c8ec73b0STianling Shen	};
37*c8ec73b0STianling Shen
38*c8ec73b0STianling Shen	vdd_usbc: vdd-usbc-regulator {
39*c8ec73b0STianling Shen		compatible = "regulator-fixed";
40*c8ec73b0STianling Shen		regulator-name = "vdd_usbc";
41*c8ec73b0STianling Shen		regulator-always-on;
42*c8ec73b0STianling Shen		regulator-boot-on;
43*c8ec73b0STianling Shen		regulator-min-microvolt = <5000000>;
44*c8ec73b0STianling Shen		regulator-max-microvolt = <5000000>;
45*c8ec73b0STianling Shen	};
46*c8ec73b0STianling Shen
47*c8ec73b0STianling Shen	vcc3v3_sys: vcc3v3-sys-regulator {
48*c8ec73b0STianling Shen		compatible = "regulator-fixed";
49*c8ec73b0STianling Shen		regulator-name = "vcc3v3_sys";
50*c8ec73b0STianling Shen		regulator-always-on;
51*c8ec73b0STianling Shen		regulator-boot-on;
52*c8ec73b0STianling Shen		regulator-min-microvolt = <3300000>;
53*c8ec73b0STianling Shen		regulator-max-microvolt = <3300000>;
54*c8ec73b0STianling Shen		vin-supply = <&vdd_usbc>;
55*c8ec73b0STianling Shen	};
56*c8ec73b0STianling Shen
57*c8ec73b0STianling Shen	vcc5v0_sys: vcc5v0-sys-regulator {
58*c8ec73b0STianling Shen		compatible = "regulator-fixed";
59*c8ec73b0STianling Shen		regulator-name = "vcc5v0_sys";
60*c8ec73b0STianling Shen		regulator-always-on;
61*c8ec73b0STianling Shen		regulator-boot-on;
62*c8ec73b0STianling Shen		regulator-min-microvolt = <5000000>;
63*c8ec73b0STianling Shen		regulator-max-microvolt = <5000000>;
64*c8ec73b0STianling Shen		vin-supply = <&vdd_usbc>;
65*c8ec73b0STianling Shen	};
66*c8ec73b0STianling Shen
67*c8ec73b0STianling Shen	vcc3v3_pcie: vcc3v3-pcie-regulator {
68*c8ec73b0STianling Shen		compatible = "regulator-fixed";
69*c8ec73b0STianling Shen		regulator-name = "vcc3v3_pcie";
70*c8ec73b0STianling Shen		regulator-min-microvolt = <3300000>;
71*c8ec73b0STianling Shen		regulator-max-microvolt = <3300000>;
72*c8ec73b0STianling Shen		enable-active-high;
73*c8ec73b0STianling Shen		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
74*c8ec73b0STianling Shen		startup-delay-us = <200000>;
75*c8ec73b0STianling Shen		vin-supply = <&vcc5v0_sys>;
76*c8ec73b0STianling Shen	};
77*c8ec73b0STianling Shen
78*c8ec73b0STianling Shen	vcc5v0_usb: vcc5v0-usb-regulator {
79*c8ec73b0STianling Shen		compatible = "regulator-fixed";
80*c8ec73b0STianling Shen		regulator-name = "vcc5v0_usb";
81*c8ec73b0STianling Shen		regulator-always-on;
82*c8ec73b0STianling Shen		regulator-boot-on;
83*c8ec73b0STianling Shen		regulator-min-microvolt = <5000000>;
84*c8ec73b0STianling Shen		regulator-max-microvolt = <5000000>;
85*c8ec73b0STianling Shen		vin-supply = <&vdd_usbc>;
86*c8ec73b0STianling Shen	};
87*c8ec73b0STianling Shen
88*c8ec73b0STianling Shen	vcc5v0_usb_host: vcc5v0-usb-host-regulator {
89*c8ec73b0STianling Shen		compatible = "regulator-fixed";
90*c8ec73b0STianling Shen		enable-active-high;
91*c8ec73b0STianling Shen		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
92*c8ec73b0STianling Shen		pinctrl-names = "default";
93*c8ec73b0STianling Shen		pinctrl-0 = <&vcc5v0_usb_host_en>;
94*c8ec73b0STianling Shen		regulator-name = "vcc5v0_usb_host";
95*c8ec73b0STianling Shen		regulator-always-on;
96*c8ec73b0STianling Shen		regulator-boot-on;
97*c8ec73b0STianling Shen		regulator-min-microvolt = <5000000>;
98*c8ec73b0STianling Shen		regulator-max-microvolt = <5000000>;
99*c8ec73b0STianling Shen		vin-supply = <&vcc5v0_usb>;
100*c8ec73b0STianling Shen	};
101*c8ec73b0STianling Shen
102*c8ec73b0STianling Shen	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
103*c8ec73b0STianling Shen		compatible = "regulator-fixed";
104*c8ec73b0STianling Shen		enable-active-high;
105*c8ec73b0STianling Shen		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
106*c8ec73b0STianling Shen		pinctrl-names = "default";
107*c8ec73b0STianling Shen		pinctrl-0 = <&vcc5v0_usb_otg_en>;
108*c8ec73b0STianling Shen		regulator-name = "vcc5v0_usb_otg";
109*c8ec73b0STianling Shen		regulator-min-microvolt = <5000000>;
110*c8ec73b0STianling Shen		regulator-max-microvolt = <5000000>;
111*c8ec73b0STianling Shen		vin-supply = <&vcc5v0_usb>;
112*c8ec73b0STianling Shen	};
113*c8ec73b0STianling Shen
114*c8ec73b0STianling Shen	pcie30_avdd0v9: pcie30-avdd0v9-regulator {
115*c8ec73b0STianling Shen		compatible = "regulator-fixed";
116*c8ec73b0STianling Shen		regulator-name = "pcie30_avdd0v9";
117*c8ec73b0STianling Shen		regulator-always-on;
118*c8ec73b0STianling Shen		regulator-boot-on;
119*c8ec73b0STianling Shen		regulator-min-microvolt = <900000>;
120*c8ec73b0STianling Shen		regulator-max-microvolt = <900000>;
121*c8ec73b0STianling Shen		vin-supply = <&vcc3v3_sys>;
122*c8ec73b0STianling Shen	};
123*c8ec73b0STianling Shen
124*c8ec73b0STianling Shen	pcie30_avdd1v8: pcie30-avdd1v8-regulator {
125*c8ec73b0STianling Shen		compatible = "regulator-fixed";
126*c8ec73b0STianling Shen		regulator-name = "pcie30_avdd1v8";
127*c8ec73b0STianling Shen		regulator-always-on;
128*c8ec73b0STianling Shen		regulator-boot-on;
129*c8ec73b0STianling Shen		regulator-min-microvolt = <1800000>;
130*c8ec73b0STianling Shen		regulator-max-microvolt = <1800000>;
131*c8ec73b0STianling Shen		vin-supply = <&vcc3v3_sys>;
132*c8ec73b0STianling Shen	};
133*c8ec73b0STianling Shen};
134*c8ec73b0STianling Shen
135*c8ec73b0STianling Shen&combphy0 {
136*c8ec73b0STianling Shen	status = "okay";
137*c8ec73b0STianling Shen};
138*c8ec73b0STianling Shen
139*c8ec73b0STianling Shen&combphy1 {
140*c8ec73b0STianling Shen	status = "okay";
141*c8ec73b0STianling Shen};
142*c8ec73b0STianling Shen
143*c8ec73b0STianling Shen&combphy2 {
144*c8ec73b0STianling Shen	status = "okay";
145*c8ec73b0STianling Shen};
146*c8ec73b0STianling Shen
147*c8ec73b0STianling Shen&cpu0 {
148*c8ec73b0STianling Shen	cpu-supply = <&vdd_cpu>;
149*c8ec73b0STianling Shen};
150*c8ec73b0STianling Shen
151*c8ec73b0STianling Shen&cpu1 {
152*c8ec73b0STianling Shen	cpu-supply = <&vdd_cpu>;
153*c8ec73b0STianling Shen};
154*c8ec73b0STianling Shen
155*c8ec73b0STianling Shen&cpu2 {
156*c8ec73b0STianling Shen	cpu-supply = <&vdd_cpu>;
157*c8ec73b0STianling Shen};
158*c8ec73b0STianling Shen
159*c8ec73b0STianling Shen&cpu3 {
160*c8ec73b0STianling Shen	cpu-supply = <&vdd_cpu>;
161*c8ec73b0STianling Shen};
162*c8ec73b0STianling Shen
163*c8ec73b0STianling Shen&gpu {
164*c8ec73b0STianling Shen	mali-supply = <&vdd_gpu>;
165*c8ec73b0STianling Shen	status = "okay";
166*c8ec73b0STianling Shen};
167*c8ec73b0STianling Shen
168*c8ec73b0STianling Shen&hdmi {
169*c8ec73b0STianling Shen	avdd-0v9-supply = <&vdda0v9_image>;
170*c8ec73b0STianling Shen	avdd-1v8-supply = <&vcca1v8_image>;
171*c8ec73b0STianling Shen	status = "okay";
172*c8ec73b0STianling Shen};
173*c8ec73b0STianling Shen
174*c8ec73b0STianling Shen&hdmi_in {
175*c8ec73b0STianling Shen	hdmi_in_vp0: endpoint {
176*c8ec73b0STianling Shen		remote-endpoint = <&vp0_out_hdmi>;
177*c8ec73b0STianling Shen	};
178*c8ec73b0STianling Shen};
179*c8ec73b0STianling Shen
180*c8ec73b0STianling Shen&hdmi_out {
181*c8ec73b0STianling Shen	hdmi_out_con: endpoint {
182*c8ec73b0STianling Shen		remote-endpoint = <&hdmi_con_in>;
183*c8ec73b0STianling Shen	};
184*c8ec73b0STianling Shen};
185*c8ec73b0STianling Shen
186*c8ec73b0STianling Shen&hdmi_sound {
187*c8ec73b0STianling Shen	status = "okay";
188*c8ec73b0STianling Shen};
189*c8ec73b0STianling Shen
190*c8ec73b0STianling Shen&i2c0 {
191*c8ec73b0STianling Shen	status = "okay";
192*c8ec73b0STianling Shen
193*c8ec73b0STianling Shen	vdd_cpu: regulator@1c {
194*c8ec73b0STianling Shen		compatible = "tcs,tcs4525";
195*c8ec73b0STianling Shen		reg = <0x1c>;
196*c8ec73b0STianling Shen		fcs,suspend-voltage-selector = <1>;
197*c8ec73b0STianling Shen		regulator-name = "vdd_cpu";
198*c8ec73b0STianling Shen		regulator-always-on;
199*c8ec73b0STianling Shen		regulator-boot-on;
200*c8ec73b0STianling Shen		regulator-min-microvolt = <800000>;
201*c8ec73b0STianling Shen		regulator-max-microvolt = <1150000>;
202*c8ec73b0STianling Shen		regulator-ramp-delay = <2300>;
203*c8ec73b0STianling Shen		vin-supply = <&vcc5v0_sys>;
204*c8ec73b0STianling Shen
205*c8ec73b0STianling Shen		regulator-state-mem {
206*c8ec73b0STianling Shen			regulator-off-in-suspend;
207*c8ec73b0STianling Shen		};
208*c8ec73b0STianling Shen	};
209*c8ec73b0STianling Shen
210*c8ec73b0STianling Shen	rk809: pmic@20 {
211*c8ec73b0STianling Shen		compatible = "rockchip,rk809";
212*c8ec73b0STianling Shen		reg = <0x20>;
213*c8ec73b0STianling Shen		interrupt-parent = <&gpio0>;
214*c8ec73b0STianling Shen		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
215*c8ec73b0STianling Shen		#clock-cells = <1>;
216*c8ec73b0STianling Shen		pinctrl-names = "default";
217*c8ec73b0STianling Shen		pinctrl-0 = <&pmic_int>;
218*c8ec73b0STianling Shen		rockchip,system-power-controller;
219*c8ec73b0STianling Shen		vcc1-supply = <&vcc3v3_sys>;
220*c8ec73b0STianling Shen		vcc2-supply = <&vcc3v3_sys>;
221*c8ec73b0STianling Shen		vcc3-supply = <&vcc3v3_sys>;
222*c8ec73b0STianling Shen		vcc4-supply = <&vcc3v3_sys>;
223*c8ec73b0STianling Shen		vcc5-supply = <&vcc3v3_sys>;
224*c8ec73b0STianling Shen		vcc6-supply = <&vcc3v3_sys>;
225*c8ec73b0STianling Shen		vcc7-supply = <&vcc3v3_sys>;
226*c8ec73b0STianling Shen		vcc8-supply = <&vcc3v3_sys>;
227*c8ec73b0STianling Shen		vcc9-supply = <&vcc3v3_sys>;
228*c8ec73b0STianling Shen		wakeup-source;
229*c8ec73b0STianling Shen
230*c8ec73b0STianling Shen		regulators {
231*c8ec73b0STianling Shen			vdd_logic: DCDC_REG1 {
232*c8ec73b0STianling Shen				regulator-name = "vdd_logic";
233*c8ec73b0STianling Shen				regulator-always-on;
234*c8ec73b0STianling Shen				regulator-boot-on;
235*c8ec73b0STianling Shen				regulator-initial-mode = <0x2>;
236*c8ec73b0STianling Shen				regulator-min-microvolt = <500000>;
237*c8ec73b0STianling Shen				regulator-max-microvolt = <1350000>;
238*c8ec73b0STianling Shen				regulator-ramp-delay = <6001>;
239*c8ec73b0STianling Shen
240*c8ec73b0STianling Shen				regulator-state-mem {
241*c8ec73b0STianling Shen					regulator-off-in-suspend;
242*c8ec73b0STianling Shen				};
243*c8ec73b0STianling Shen			};
244*c8ec73b0STianling Shen
245*c8ec73b0STianling Shen			vdd_gpu: DCDC_REG2 {
246*c8ec73b0STianling Shen				regulator-name = "vdd_gpu";
247*c8ec73b0STianling Shen				regulator-always-on;
248*c8ec73b0STianling Shen				regulator-initial-mode = <0x2>;
249*c8ec73b0STianling Shen				regulator-min-microvolt = <500000>;
250*c8ec73b0STianling Shen				regulator-max-microvolt = <1350000>;
251*c8ec73b0STianling Shen				regulator-ramp-delay = <6001>;
252*c8ec73b0STianling Shen
253*c8ec73b0STianling Shen				regulator-state-mem {
254*c8ec73b0STianling Shen					regulator-off-in-suspend;
255*c8ec73b0STianling Shen				};
256*c8ec73b0STianling Shen			};
257*c8ec73b0STianling Shen
258*c8ec73b0STianling Shen			vcc_ddr: DCDC_REG3 {
259*c8ec73b0STianling Shen				regulator-name = "vcc_ddr";
260*c8ec73b0STianling Shen				regulator-always-on;
261*c8ec73b0STianling Shen				regulator-boot-on;
262*c8ec73b0STianling Shen				regulator-initial-mode = <0x2>;
263*c8ec73b0STianling Shen
264*c8ec73b0STianling Shen				regulator-state-mem {
265*c8ec73b0STianling Shen					regulator-on-in-suspend;
266*c8ec73b0STianling Shen				};
267*c8ec73b0STianling Shen			};
268*c8ec73b0STianling Shen
269*c8ec73b0STianling Shen			vdd_npu: DCDC_REG4 {
270*c8ec73b0STianling Shen				regulator-name = "vdd_npu";
271*c8ec73b0STianling Shen				regulator-initial-mode = <0x2>;
272*c8ec73b0STianling Shen				regulator-min-microvolt = <500000>;
273*c8ec73b0STianling Shen				regulator-max-microvolt = <1350000>;
274*c8ec73b0STianling Shen				regulator-ramp-delay = <6001>;
275*c8ec73b0STianling Shen
276*c8ec73b0STianling Shen				regulator-state-mem {
277*c8ec73b0STianling Shen					regulator-off-in-suspend;
278*c8ec73b0STianling Shen				};
279*c8ec73b0STianling Shen			};
280*c8ec73b0STianling Shen
281*c8ec73b0STianling Shen			vcc_1v8: DCDC_REG5 {
282*c8ec73b0STianling Shen				regulator-name = "vcc_1v8";
283*c8ec73b0STianling Shen				regulator-always-on;
284*c8ec73b0STianling Shen				regulator-boot-on;
285*c8ec73b0STianling Shen				regulator-min-microvolt = <1800000>;
286*c8ec73b0STianling Shen				regulator-max-microvolt = <1800000>;
287*c8ec73b0STianling Shen
288*c8ec73b0STianling Shen				regulator-state-mem {
289*c8ec73b0STianling Shen					regulator-off-in-suspend;
290*c8ec73b0STianling Shen				};
291*c8ec73b0STianling Shen			};
292*c8ec73b0STianling Shen
293*c8ec73b0STianling Shen			vdda0v9_image: LDO_REG1 {
294*c8ec73b0STianling Shen				regulator-name = "vdda0v9_image";
295*c8ec73b0STianling Shen				regulator-min-microvolt = <950000>;
296*c8ec73b0STianling Shen				regulator-max-microvolt = <950000>;
297*c8ec73b0STianling Shen
298*c8ec73b0STianling Shen				regulator-state-mem {
299*c8ec73b0STianling Shen					regulator-off-in-suspend;
300*c8ec73b0STianling Shen				};
301*c8ec73b0STianling Shen			};
302*c8ec73b0STianling Shen
303*c8ec73b0STianling Shen			vdda_0v9: LDO_REG2 {
304*c8ec73b0STianling Shen				regulator-name = "vdda_0v9";
305*c8ec73b0STianling Shen				regulator-always-on;
306*c8ec73b0STianling Shen				regulator-boot-on;
307*c8ec73b0STianling Shen				regulator-min-microvolt = <900000>;
308*c8ec73b0STianling Shen				regulator-max-microvolt = <900000>;
309*c8ec73b0STianling Shen
310*c8ec73b0STianling Shen				regulator-state-mem {
311*c8ec73b0STianling Shen					regulator-off-in-suspend;
312*c8ec73b0STianling Shen				};
313*c8ec73b0STianling Shen			};
314*c8ec73b0STianling Shen
315*c8ec73b0STianling Shen			vdda0v9_pmu: LDO_REG3 {
316*c8ec73b0STianling Shen				regulator-name = "vdda0v9_pmu";
317*c8ec73b0STianling Shen				regulator-always-on;
318*c8ec73b0STianling Shen				regulator-boot-on;
319*c8ec73b0STianling Shen				regulator-min-microvolt = <900000>;
320*c8ec73b0STianling Shen				regulator-max-microvolt = <900000>;
321*c8ec73b0STianling Shen
322*c8ec73b0STianling Shen				regulator-state-mem {
323*c8ec73b0STianling Shen					regulator-on-in-suspend;
324*c8ec73b0STianling Shen					regulator-suspend-microvolt = <900000>;
325*c8ec73b0STianling Shen				};
326*c8ec73b0STianling Shen			};
327*c8ec73b0STianling Shen
328*c8ec73b0STianling Shen			vccio_acodec: LDO_REG4 {
329*c8ec73b0STianling Shen				regulator-name = "vccio_acodec";
330*c8ec73b0STianling Shen				regulator-min-microvolt = <3300000>;
331*c8ec73b0STianling Shen				regulator-max-microvolt = <3300000>;
332*c8ec73b0STianling Shen
333*c8ec73b0STianling Shen				regulator-state-mem {
334*c8ec73b0STianling Shen					regulator-off-in-suspend;
335*c8ec73b0STianling Shen				};
336*c8ec73b0STianling Shen			};
337*c8ec73b0STianling Shen
338*c8ec73b0STianling Shen			vccio_sd: LDO_REG5 {
339*c8ec73b0STianling Shen				regulator-name = "vccio_sd";
340*c8ec73b0STianling Shen				regulator-min-microvolt = <1800000>;
341*c8ec73b0STianling Shen				regulator-max-microvolt = <3300000>;
342*c8ec73b0STianling Shen
343*c8ec73b0STianling Shen				regulator-state-mem {
344*c8ec73b0STianling Shen					regulator-off-in-suspend;
345*c8ec73b0STianling Shen				};
346*c8ec73b0STianling Shen			};
347*c8ec73b0STianling Shen
348*c8ec73b0STianling Shen			vcc3v3_pmu: LDO_REG6 {
349*c8ec73b0STianling Shen				regulator-name = "vcc3v3_pmu";
350*c8ec73b0STianling Shen				regulator-always-on;
351*c8ec73b0STianling Shen				regulator-boot-on;
352*c8ec73b0STianling Shen				regulator-min-microvolt = <3300000>;
353*c8ec73b0STianling Shen				regulator-max-microvolt = <3300000>;
354*c8ec73b0STianling Shen
355*c8ec73b0STianling Shen				regulator-state-mem {
356*c8ec73b0STianling Shen					regulator-on-in-suspend;
357*c8ec73b0STianling Shen					regulator-suspend-microvolt = <3300000>;
358*c8ec73b0STianling Shen				};
359*c8ec73b0STianling Shen			};
360*c8ec73b0STianling Shen
361*c8ec73b0STianling Shen			vcca_1v8: LDO_REG7 {
362*c8ec73b0STianling Shen				regulator-name = "vcca_1v8";
363*c8ec73b0STianling Shen				regulator-always-on;
364*c8ec73b0STianling Shen				regulator-boot-on;
365*c8ec73b0STianling Shen				regulator-min-microvolt = <1800000>;
366*c8ec73b0STianling Shen				regulator-max-microvolt = <1800000>;
367*c8ec73b0STianling Shen
368*c8ec73b0STianling Shen				regulator-state-mem {
369*c8ec73b0STianling Shen					regulator-off-in-suspend;
370*c8ec73b0STianling Shen				};
371*c8ec73b0STianling Shen			};
372*c8ec73b0STianling Shen
373*c8ec73b0STianling Shen			vcca1v8_pmu: LDO_REG8 {
374*c8ec73b0STianling Shen				regulator-name = "vcca1v8_pmu";
375*c8ec73b0STianling Shen				regulator-always-on;
376*c8ec73b0STianling Shen				regulator-boot-on;
377*c8ec73b0STianling Shen				regulator-min-microvolt = <1800000>;
378*c8ec73b0STianling Shen				regulator-max-microvolt = <1800000>;
379*c8ec73b0STianling Shen
380*c8ec73b0STianling Shen				regulator-state-mem {
381*c8ec73b0STianling Shen					regulator-on-in-suspend;
382*c8ec73b0STianling Shen					regulator-suspend-microvolt = <1800000>;
383*c8ec73b0STianling Shen				};
384*c8ec73b0STianling Shen			};
385*c8ec73b0STianling Shen
386*c8ec73b0STianling Shen			vcca1v8_image: LDO_REG9 {
387*c8ec73b0STianling Shen				regulator-name = "vcca1v8_image";
388*c8ec73b0STianling Shen				regulator-min-microvolt = <1800000>;
389*c8ec73b0STianling Shen				regulator-max-microvolt = <1800000>;
390*c8ec73b0STianling Shen
391*c8ec73b0STianling Shen				regulator-state-mem {
392*c8ec73b0STianling Shen					regulator-off-in-suspend;
393*c8ec73b0STianling Shen				};
394*c8ec73b0STianling Shen			};
395*c8ec73b0STianling Shen
396*c8ec73b0STianling Shen			vcc_3v3: SWITCH_REG1 {
397*c8ec73b0STianling Shen				regulator-name = "vcc_3v3";
398*c8ec73b0STianling Shen				regulator-always-on;
399*c8ec73b0STianling Shen				regulator-boot-on;
400*c8ec73b0STianling Shen
401*c8ec73b0STianling Shen				regulator-state-mem {
402*c8ec73b0STianling Shen					regulator-off-in-suspend;
403*c8ec73b0STianling Shen				};
404*c8ec73b0STianling Shen			};
405*c8ec73b0STianling Shen
406*c8ec73b0STianling Shen			vcc3v3_sd: SWITCH_REG2 {
407*c8ec73b0STianling Shen				regulator-name = "vcc3v3_sd";
408*c8ec73b0STianling Shen				regulator-always-on;
409*c8ec73b0STianling Shen				regulator-boot-on;
410*c8ec73b0STianling Shen
411*c8ec73b0STianling Shen				regulator-state-mem {
412*c8ec73b0STianling Shen					regulator-off-in-suspend;
413*c8ec73b0STianling Shen				};
414*c8ec73b0STianling Shen			};
415*c8ec73b0STianling Shen		};
416*c8ec73b0STianling Shen
417*c8ec73b0STianling Shen	};
418*c8ec73b0STianling Shen};
419*c8ec73b0STianling Shen
420*c8ec73b0STianling Shen&i2c5 {
421*c8ec73b0STianling Shen	status = "okay";
422*c8ec73b0STianling Shen
423*c8ec73b0STianling Shen	hym8563: rtc@51 {
424*c8ec73b0STianling Shen		compatible = "haoyu,hym8563";
425*c8ec73b0STianling Shen		reg = <0x51>;
426*c8ec73b0STianling Shen		interrupt-parent = <&gpio0>;
427*c8ec73b0STianling Shen		interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
428*c8ec73b0STianling Shen		#clock-cells = <0>;
429*c8ec73b0STianling Shen		clock-output-names = "rtcic_32kout";
430*c8ec73b0STianling Shen		pinctrl-names = "default";
431*c8ec73b0STianling Shen		pinctrl-0 = <&hym8563_int>;
432*c8ec73b0STianling Shen		wakeup-source;
433*c8ec73b0STianling Shen	};
434*c8ec73b0STianling Shen};
435*c8ec73b0STianling Shen
436*c8ec73b0STianling Shen&i2s0_8ch {
437*c8ec73b0STianling Shen	status = "okay";
438*c8ec73b0STianling Shen};
439*c8ec73b0STianling Shen
440*c8ec73b0STianling Shen&pcie30phy {
441*c8ec73b0STianling Shen	data-lanes = <1 2>;
442*c8ec73b0STianling Shen	status = "okay";
443*c8ec73b0STianling Shen};
444*c8ec73b0STianling Shen
445*c8ec73b0STianling Shen&pinctrl {
446*c8ec73b0STianling Shen	hym8563 {
447*c8ec73b0STianling Shen		hym8563_int: hym8563-int {
448*c8ec73b0STianling Shen			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
449*c8ec73b0STianling Shen		};
450*c8ec73b0STianling Shen	};
451*c8ec73b0STianling Shen
452*c8ec73b0STianling Shen	pmic {
453*c8ec73b0STianling Shen		pmic_int: pmic-int {
454*c8ec73b0STianling Shen			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
455*c8ec73b0STianling Shen		};
456*c8ec73b0STianling Shen	};
457*c8ec73b0STianling Shen
458*c8ec73b0STianling Shen	usb {
459*c8ec73b0STianling Shen		vcc5v0_usb_host_en: vcc5v0-usb-host-en {
460*c8ec73b0STianling Shen			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
461*c8ec73b0STianling Shen		};
462*c8ec73b0STianling Shen
463*c8ec73b0STianling Shen		vcc5v0_usb_otg_en: vcc5v0-usb-otg-en {
464*c8ec73b0STianling Shen			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
465*c8ec73b0STianling Shen		};
466*c8ec73b0STianling Shen	};
467*c8ec73b0STianling Shen};
468*c8ec73b0STianling Shen
469*c8ec73b0STianling Shen&pmu_io_domains {
470*c8ec73b0STianling Shen	pmuio1-supply = <&vcc3v3_pmu>;
471*c8ec73b0STianling Shen	pmuio2-supply = <&vcc3v3_pmu>;
472*c8ec73b0STianling Shen	vccio1-supply = <&vccio_acodec>;
473*c8ec73b0STianling Shen	vccio3-supply = <&vccio_sd>;
474*c8ec73b0STianling Shen	vccio4-supply = <&vcc_1v8>;
475*c8ec73b0STianling Shen	vccio5-supply = <&vcc_3v3>;
476*c8ec73b0STianling Shen	vccio6-supply = <&vcc_1v8>;
477*c8ec73b0STianling Shen	vccio7-supply = <&vcc_3v3>;
478*c8ec73b0STianling Shen	status = "okay";
479*c8ec73b0STianling Shen};
480*c8ec73b0STianling Shen
481*c8ec73b0STianling Shen&saradc {
482*c8ec73b0STianling Shen	vref-supply = <&vcca_1v8>;
483*c8ec73b0STianling Shen	status = "okay";
484*c8ec73b0STianling Shen};
485*c8ec73b0STianling Shen
486*c8ec73b0STianling Shen&sdhci {
487*c8ec73b0STianling Shen	bus-width = <8>;
488*c8ec73b0STianling Shen	max-frequency = <200000000>;
489*c8ec73b0STianling Shen	non-removable;
490*c8ec73b0STianling Shen	pinctrl-names = "default";
491*c8ec73b0STianling Shen	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
492*c8ec73b0STianling Shen	status = "okay";
493*c8ec73b0STianling Shen};
494*c8ec73b0STianling Shen
495*c8ec73b0STianling Shen&sdmmc0 {
496*c8ec73b0STianling Shen	max-frequency = <150000000>;
497*c8ec73b0STianling Shen	no-sdio;
498*c8ec73b0STianling Shen	no-mmc;
499*c8ec73b0STianling Shen	bus-width = <4>;
500*c8ec73b0STianling Shen	cap-mmc-highspeed;
501*c8ec73b0STianling Shen	cap-sd-highspeed;
502*c8ec73b0STianling Shen	disable-wp;
503*c8ec73b0STianling Shen	vmmc-supply = <&vcc3v3_sd>;
504*c8ec73b0STianling Shen	vqmmc-supply = <&vccio_sd>;
505*c8ec73b0STianling Shen	pinctrl-names = "default";
506*c8ec73b0STianling Shen	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
507*c8ec73b0STianling Shen	status = "okay";
508*c8ec73b0STianling Shen};
509*c8ec73b0STianling Shen
510*c8ec73b0STianling Shen&tsadc {
511*c8ec73b0STianling Shen	rockchip,hw-tshut-mode = <1>;
512*c8ec73b0STianling Shen	rockchip,hw-tshut-polarity = <0>;
513*c8ec73b0STianling Shen	status = "okay";
514*c8ec73b0STianling Shen};
515*c8ec73b0STianling Shen
516*c8ec73b0STianling Shen&uart2 {
517*c8ec73b0STianling Shen	status = "okay";
518*c8ec73b0STianling Shen};
519*c8ec73b0STianling Shen
520*c8ec73b0STianling Shen&usb_host0_ehci {
521*c8ec73b0STianling Shen	status = "okay";
522*c8ec73b0STianling Shen};
523*c8ec73b0STianling Shen
524*c8ec73b0STianling Shen&usb_host0_ohci {
525*c8ec73b0STianling Shen	status = "okay";
526*c8ec73b0STianling Shen};
527*c8ec73b0STianling Shen
528*c8ec73b0STianling Shen&usb_host0_xhci {
529*c8ec73b0STianling Shen	extcon = <&usb2phy0>;
530*c8ec73b0STianling Shen	dr_mode = "host";
531*c8ec73b0STianling Shen	status = "okay";
532*c8ec73b0STianling Shen};
533*c8ec73b0STianling Shen
534*c8ec73b0STianling Shen&usb_host1_ehci {
535*c8ec73b0STianling Shen	status = "okay";
536*c8ec73b0STianling Shen};
537*c8ec73b0STianling Shen
538*c8ec73b0STianling Shen&usb_host1_ohci {
539*c8ec73b0STianling Shen	status = "okay";
540*c8ec73b0STianling Shen};
541*c8ec73b0STianling Shen
542*c8ec73b0STianling Shen&usb_host1_xhci {
543*c8ec73b0STianling Shen	status = "okay";
544*c8ec73b0STianling Shen};
545*c8ec73b0STianling Shen
546*c8ec73b0STianling Shen&usb2phy0 {
547*c8ec73b0STianling Shen	status = "okay";
548*c8ec73b0STianling Shen};
549*c8ec73b0STianling Shen
550*c8ec73b0STianling Shen&usb2phy0_host {
551*c8ec73b0STianling Shen	phy-supply = <&vcc5v0_usb_host>;
552*c8ec73b0STianling Shen	status = "okay";
553*c8ec73b0STianling Shen};
554*c8ec73b0STianling Shen
555*c8ec73b0STianling Shen&usb2phy0_otg {
556*c8ec73b0STianling Shen	status = "okay";
557*c8ec73b0STianling Shen};
558*c8ec73b0STianling Shen
559*c8ec73b0STianling Shen&usb2phy1 {
560*c8ec73b0STianling Shen	status = "okay";
561*c8ec73b0STianling Shen};
562*c8ec73b0STianling Shen
563*c8ec73b0STianling Shen&usb2phy1_host {
564*c8ec73b0STianling Shen	phy-supply = <&vcc5v0_usb_otg>;
565*c8ec73b0STianling Shen	status = "okay";
566*c8ec73b0STianling Shen};
567*c8ec73b0STianling Shen
568*c8ec73b0STianling Shen&usb2phy1_otg {
569*c8ec73b0STianling Shen	status = "okay";
570*c8ec73b0STianling Shen};
571*c8ec73b0STianling Shen
572*c8ec73b0STianling Shen&vop {
573*c8ec73b0STianling Shen	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
574*c8ec73b0STianling Shen	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
575*c8ec73b0STianling Shen	status = "okay";
576*c8ec73b0STianling Shen};
577*c8ec73b0STianling Shen
578*c8ec73b0STianling Shen&vop_mmu {
579*c8ec73b0STianling Shen	status = "okay";
580*c8ec73b0STianling Shen};
581*c8ec73b0STianling Shen
582*c8ec73b0STianling Shen&vp0 {
583*c8ec73b0STianling Shen	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
584*c8ec73b0STianling Shen		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
585*c8ec73b0STianling Shen		remote-endpoint = <&hdmi_in_vp0>;
586*c8ec73b0STianling Shen	};
587*c8ec73b0STianling Shen};
588