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Searched refs:DCLK_VOP0 (Results 1 – 24 of 24) sorted by relevance

/linux/include/dt-bindings/clock/
H A Drk3288-cru.h87 #define DCLK_VOP0 190 macro
H A Drockchip,rk3528-cru.h271 #define DCLK_VOP0 259 macro
H A Drk3399-cru.h129 #define DCLK_VOP0 180 macro
H A Drockchip,rk3588-cru.h624 #define DCLK_VOP0 609 macro
H A Drk3568-cru.h287 #define DCLK_VOP0 223 macro
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3566-radxa-zero-3.dtsi516 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-box-demo.dts468 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-lubancat-1.dts575 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3568-photonicat.dts569 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3568-nanopi-r5s.dtsi591 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-odroid-m1s.dts649 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3568-easepi-r1.dts609 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3568-evb1-v10.dts729 assigned-clocks = <&cru DCLK_VOP0>, <&cru PLL_VPLL>, <&cru DCLK_VOP1>;
H A Drk3566-orangepi-3b.dtsi669 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-quartz64-b.dts731 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-anbernic-rgxx3.dtsi705 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3568-odroid-m1.dts729 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-powkiddy-rk2023.dtsi840 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-quartz64-a.dts830 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
H A Drk3566-pinetab2.dtsi923 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
/linux/drivers/clk/rockchip/
H A Dclk-rk3288.c445 COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,
H A Dclk-rk3528.c854 …COMPOSITE_NODIV(DCLK_VOP0, "dclk_vop0", dclk_vop0_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPAREN…
H A Dclk-rk3399.c282 MUX(DCLK_VOP0, "dclk_vop0", mux_dclk_vop0_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3588.c2108 COMPOSITE_NODIV(DCLK_VOP0, "dclk_vop0", dclk_vop0_p,