| /linux/drivers/clk/mediatek/ |
| H A D | Kconfig | 3 # MediaTek Clock Drivers
5 menu "Clock driver for MediaTek SoC"
22 bool "Clock driver for MediaTek MT2701"
30 bool "Clock driver for MediaTek MT2701 mmsys"
36 bool "Clock driver for MediaTek MT2701 imgsys"
42 bool "Clock driver for MediaTek MT2701 vdecsys"
48 bool "Clock driver for MediaTek MT2701 hifsys"
54 bool "Clock driver for MediaTek MT2701 ethsys"
60 bool "Clock driver for MediaTek MT2701 bdpsys"
66 bool "Clock driver for Mediatek MT2701 audsys"
[all …]
|
| /linux/drivers/clk/imx/ |
| H A D | Kconfig | 67 tristate "IMX8MM CCM Clock Driver"
71 Build the driver for i.MX8MM CCM Clock Driver
74 tristate "IMX8MN CCM Clock Driver"
78 Build the driver for i.MX8MN CCM Clock Driver
81 tristate "IMX8MP CCM Clock Driver"
86 Build the driver for i.MX8MP CCM Clock Driver
89 tristate "IMX8MQ CCM Clock Driver"
93 Build the driver for i.MX8MQ CCM Clock Driver
96 tristate "IMX8QXP SCU Clock"
105 tristate "IMX8ULP CCM Clock Driver"
[all …]
|
| /linux/drivers/clk/rockchip/ |
| H A D | Kconfig | 17 Build the driver for PX30 Clock Driver.
24 Build the driver for RV110x Clock Driver.
31 Build the driver for RV1126 Clock Driver.
38 Build the driver for RK3036 Clock Driver.
45 Build the driver for RK312x Clock Driver.
52 Build the driver for RK3188 Clock Driver.
59 Build the driver for RK322x Clock Driver.
66 Build the driver for RK3288 Clock Driver.
73 Build the driver for RK3308 Clock Driver.
80 Build the driver for RK3328 Clock Driver.
[all …]
|
| /linux/drivers/clk/ |
| H A D | Kconfig | 22 bool "Common Clock Framework"
37 tristate "Clock driver for WM831x/2x PMICs"
54 tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner"
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
62 tristate "Clock driver for Apple SoC NCOs"
71 tristate "Clock driver for Maxim 77620/77686/77802 MFD"
78 tristate "Maxim 9485 Programmable Clock Generator"
81 This driver supports Maxim 9485 Programmable Audio Clock Generator
84 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
92 tristate "Clock driver for Hi655x" if EXPERT
[all …]
|
| /linux/drivers/clk/hisilicon/ |
| H A D | Kconfig | 3 tristate "HI3516CV300 Clock Driver"
11 tristate "Hi3519 Clock Driver"
19 bool "Hi3559A Clock Driver"
27 bool "Hi3660 Clock Driver"
34 bool "Hi3670 Clock Driver"
41 tristate "Hi3798CV200 Clock Driver"
49 bool "Hi6220 Clock Driver"
63 bool "Hi6220 Stub Clock Driver" if EXPERT
71 bool "Hi3660 Stub Clock Driver" if EXPERT
|
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | mvebu-gated-clock.txt | 1 * Gated Clock bindings for Marvell EBU SoCs
11 ID Clock Peripheral
14 1 pex0_en PCIe 0 Clock out
15 2 pex1_en PCIe 1 Clock out
28 ID Clock Peripheral
33 5 pex0 PCIe 0 Clock out
34 6 pex1 PCIe 1 Clock out
55 ID Clock Peripheral
82 ID Clock Peripheral
96 ID Clock Peripheral
[all …]
|
| H A D | dove-divider-clock.txt | 9 ID Clock
18 - reg : shall be the register address of the Core PLL and Clock Divider
20 Core PLL and Clock Divider Control 1 register. Thus, it will have
|
| H A D | mvebu-core-clock.txt | 1 * Core Clock bindings for Marvell MVEBU SoCs
30 3 = hclk (SDRAM Controller Internal Clock)
31 4 = dclk (SDRAM Interface Clock)
32 5 = refclk (Reference Clock)
38 3 = mpll (MPLL Clock)
|
| H A D | armada3700-periph-clock.txt | 1 * Peripheral Clock bindings for Marvell Armada 37xx SoCs
13 ID Clock name Description
34 ID Clock name Description
56 - reg : must be the register address of North/South Bridge Clock register
|
| H A D | zynq-7000.txt | 1 Device Tree Clock bindings for the Zynq 7000 EPP
9 == Clock Controller ==
31 Clock inputs:
40 Clock outputs:
|
| H A D | alphascale,acc.txt | 1 Alphascale Clock Controller
3 The ACC (Alphascale Clock Controller) is responsible for choosing proper
107 Clock consumer with only one, _AHB_ sink.
|
| /linux/Documentation/gpu/amdgpu/display/ |
| H A D | dc-glossary.rst | 34 * PCLK: Pixel Clock
35 * SYMCLK: Symbol Clock
36 * SOCCLK: GPU Engine Clock
37 * DISPCLK: Display Clock
38 * DPPCLK: DPP Clock
39 * DCFCLK: Display Controller Fabric Clock
40 * REFCLK: Real Time Reference Clock
42 * FCLK: Fabric Clock
43 * MCLK: Memory Clock
83 Display Clock Generator block
|
| /linux/drivers/clk/stm32/ |
| H A D | Kconfig | 5 bool "Clock support for common STM32MP clocks"
15 bool "Clock driver for stm32mp13x clocks"
22 bool "Clock driver for stm32mp15x clocks"
29 bool "Clock driver for stm32mp25x clocks"
|
| /linux/drivers/clk/versatile/ |
| H A D | Kconfig | 3 menu "Clock driver for ARM Reference designs"
8 bool "Clock driver for ARM Reference designs ICST"
16 bool "Clock driver for ARM SP810 System Controller"
23 tristate "Clock driver for Versatile Express OSC clock generators"
|
| /linux/drivers/clk/ralink/ |
| H A D | Kconfig | 3 # MediaTek Mt7621 Clock Driver
6 bool "Clock driver for MediaTek MT7621"
14 bool "Clock driver for MTMIPS SoCs"
|
| /linux/drivers/clk/sophgo/ |
| H A D | Kconfig | 23 tristate "Sophgo SG2042 Clock Generator support"
26 This driver supports the Clock Generator on the
37 This clock IP depends on SG2042 Clock Generator because it uses
38 clock from Clock Generator IP as input.
|
| /linux/Documentation/input/devices/ |
| H A D | amijoy.rst | 129 | 0 | M0H | JOY0DAT Horizontal Clock |
131 | 1 | M0HQ | JOY0DAT Horizontal Clock (quadrature) |
133 | 2 | M0V | JOY0DAT Vertical Clock |
135 | 3 | M0VQ | JOY0DAT Vertical Clock (quadrature) |
137 | 4 | M1V | JOY1DAT Horizontal Clock |
139 | 5 | M1VQ | JOY1DAT Horizontal Clock (quadrature) |
141 | 6 | M1V | JOY1DAT Vertical Clock |
143 | 7 | M1VQ | JOY1DAT Vertical Clock (quadrature) |
|
| /linux/drivers/clk/x86/ |
| H A D | Kconfig | 6 bool "Clock driver for Lightning Mountain(LGM) platform"
8 Clock Generation Unit(CGU) driver for MaxLinear's x86 based
|
| /linux/Documentation/sound/cards/ |
| H A D | hdspm.rst | 121 * System Clock -- suspended !!!!
123 * Name -- "System Clock Mode"
131 Clock-source controller, which is a kind of ALSA-standard. I
135 Clock-source-controller instead !!!!
137 * Clock Source
139 * Name -- "Sample Clock Source"
298 * Word Clock Sync Status
300 * Name -- "Word Clock Lock Status"
306 Word Clock Input is 0=Unlocked, 1=Locked, or 2=Synced.
|
| /linux/Documentation/devicetree/bindings/rtc/ |
| H A D | xgene-rtc.txt | 1 * APM X-Gene Real Time Clock
3 RTC controller for the APM X-Gene Real Time Clock
|
| H A D | rtc-st-lpc.txt | 4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
|
| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-class-rtc-rtc0-device-rtc_calibration | 5 Description: Attribute for calibrating ST-Ericsson AB8500 Real Time Clock
7 calibrate the AB8500.s 32KHz Real Time Clock.
|
| /linux/drivers/iio/frequency/ |
| H A D | Kconfig | 5 # Clock Distribution device drivers
12 menu "Clock Generator/Distribution"
15 tristate "Analog Devices AD9523 Low Jitter Clock Generator"
19 Clock Generator. The driver provides direct access via sysfs.
|
| /linux/Documentation/devicetree/bindings/timer/ |
| H A D | st,stih407-lpc | 4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
|
| /linux/drivers/video/fbdev/sis/ |
| H A D | initextlfb.c | 42 int Clock; in sisfb_mode_rate_to_dclock() local
75 Clock = SiS_Pr->SiS_VCLKData[ClockIndex].CLOCK * 1000; in sisfb_mode_rate_to_dclock()
77 return Clock; in sisfb_mode_rate_to_dclock()
|