| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfxhub_v3_0_3.c | 229 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in gfxhub_v3_0_3_init_cache_regs()
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| H A D | gfxhub_v2_0.c | 223 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in gfxhub_v2_0_init_cache_regs()
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| H A D | gfxhub_v1_0.c | 186 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in gfxhub_v1_0_init_cache_regs()
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| H A D | gfxhub_v11_5_0.c | 227 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in gfxhub_v11_5_0_init_cache_regs()
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| H A D | mmhub_v3_0_2.c | 242 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in mmhub_v3_0_2_init_cache_regs()
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| H A D | gfxhub_v3_0.c | 224 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in gfxhub_v3_0_init_cache_regs()
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| H A D | gfxhub_v12_0.c | 232 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in gfxhub_v12_0_init_cache_regs()
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| H A D | mmhub_v3_0_1.c | 243 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in mmhub_v3_0_1_init_cache_regs()
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| H A D | mmhub_v3_0.c | 250 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in mmhub_v3_0_init_cache_regs()
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| H A D | mmhub_v2_3.c | 218 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in mmhub_v2_3_init_cache_regs()
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| H A D | mmhub_v2_0.c | 294 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in mmhub_v2_0_init_cache_regs()
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| H A D | mmhub_v3_3.c | 239 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in mmhub_v3_3_init_cache_regs()
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| H A D | mmhub_v4_1_0.c | 251 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in mmhub_v4_1_0_init_cache_regs()
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| H A D | gfxhub_v1_2.c | 235 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in gfxhub_v1_2_xcc_init_cache_regs()
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| H A D | mmhub_v1_8.c | 238 CONTEXT1_IDENTITY_ACCESS_MODE, 1); in mmhub_v1_8_init_cache_regs()
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| H A D | gfxhub_v2_1.c | 229 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in gfxhub_v2_1_init_cache_regs()
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| H A D | mmhub_v1_7.c | 190 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in mmhub_v1_7_init_cache_regs()
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| H A D | sid.h | 378 #define CONTEXT1_IDENTITY_ACCESS_MODE(x) (((x) & 3) << 19) macro
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| H A D | mmhub_v9_4.c | 218 CONTEXT1_IDENTITY_ACCESS_MODE, 1); in mmhub_v9_4_init_cache_regs()
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| /linux/drivers/gpu/drm/radeon/ |
| H A D | ni.c | 1273 CONTEXT1_IDENTITY_ACCESS_MODE(1)); in cayman_pcie_gart_enable()
1352 CONTEXT1_IDENTITY_ACCESS_MODE(1)); in cayman_pcie_gart_disable()
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| H A D | nid.h | 110 #define CONTEXT1_IDENTITY_ACCESS_MODE(x) (((x) & 3) << 18) macro
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| H A D | sid.h | 377 #define CONTEXT1_IDENTITY_ACCESS_MODE(x) (((x) & 3) << 19) macro
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| H A D | cikd.h | 495 #define CONTEXT1_IDENTITY_ACCESS_MODE(x) (((x) & 3) << 19) macro
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| H A D | si.c | 4290 CONTEXT1_IDENTITY_ACCESS_MODE(1)); in si_pcie_gart_enable()
4376 CONTEXT1_IDENTITY_ACCESS_MODE(1)); in si_pcie_gart_disable()
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| H A D | cik.c | 5444 CONTEXT1_IDENTITY_ACCESS_MODE(1)); in cik_pcie_gart_enable()
5561 CONTEXT1_IDENTITY_ACCESS_MODE(1)); in cik_pcie_gart_disable()
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