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Searched refs:CNTX_EMPTY_INT_ENABLE (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dnid.h496 # define CNTX_EMPTY_INT_ENABLE (1 << 20) macro
H A Dcikd.h1333 # define CNTX_EMPTY_INT_ENABLE (1 << 20) macro
H A Devergreen.c4464 CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in evergreen_disable_interrupt_state()
4470 WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in evergreen_disable_interrupt_state()
4493 u32 cp_int_cntl = CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE; in evergreen_irq_set()
H A Devergreend.h1248 # define CNTX_EMPTY_INT_ENABLE (1 << 20) macro
H A Dr600d.h716 # define CNTX_EMPTY_INT_ENABLE (1 << 20) macro
H A Dr600.c3622 WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in r600_disable_interrupt_state()
3763 u32 cp_int_cntl = CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE; in r600_irq_set()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c2222 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_EMPTY_INT_ENABLE, in gfx_v11_0_enable_gui_idle_interrupt()
5008 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CNTX_EMPTY_INT_ENABLE, 0); in gfx_v11_0_soft_reset()
5118 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CNTX_EMPTY_INT_ENABLE, 1); in gfx_v11_0_soft_reset()
5491 data = REG_SET_FIELD(data, CP_INT_CNTL, CNTX_EMPTY_INT_ENABLE, 1); in gfx_v11_0_update_coarse_grain_clock_gating()
H A Dgfx_v12_0.c1887 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_EMPTY_INT_ENABLE, in gfx_v12_0_enable_gui_idle_interrupt()
4109 data = REG_SET_FIELD(data, CP_INT_CNTL, CNTX_EMPTY_INT_ENABLE, 1); in gfx_v12_0_update_coarse_grain_clock_gating()
H A Dgfx_v10_0.c5435 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_EMPTY_INT_ENABLE, in gfx_v10_0_enable_gui_idle_interrupt()