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Searched refs:CLK_VDEC_LARB1 (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt6779-vdec.c39 GATE_VDEC1_I(CLK_VDEC_LARB1, "vdec_larb1_cken", "vdec_sel", 0),
H A Dclk-mt8365-vdec.c37 GATE_VDEC1(CLK_VDEC_LARB1, "vdec_flarb1_ck", "mm_sel", 0),
H A Dclk-mt8183-vdec.c38 GATE_VDEC1_I(CLK_VDEC_LARB1, "vdec_larb1", "mm_sel", 0),
H A Dclk-mt8192-vdec.c50 GATE_VDEC2(CLK_VDEC_LARB1, "vdec_larb1", "vdec_sel", 0),
H A Dclk-mt8195-vdec.c46 GATE_VDEC2(CLK_VDEC_LARB1, "vdec_larb1", "top_vdec", 0),
/linux/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h356 #define CLK_VDEC_LARB1 1 macro
H A Dmt6779-clk.h395 #define CLK_VDEC_LARB1 2 macro
H A Dmt8183-clk.h359 #define CLK_VDEC_LARB1 1 macro
H A Dmt8192-clk.h491 #define CLK_VDEC_LARB1 0 macro
H A Dmt8195-clk.h721 #define CLK_VDEC_LARB1 0 macro
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8365.dtsi788 clocks = <&vdecsys CLK_VDEC_LARB1>,
789 <&vdecsys CLK_VDEC_LARB1>;
H A Dmt8192.dtsi651 <&vdecsys CLK_VDEC_LARB1>;
1748 <&vdecsys CLK_VDEC_LARB1>,
H A Dmt8195.dtsi622 clocks = <&vdecsys CLK_VDEC_LARB1>;
2941 clocks = <&vdecsys CLK_VDEC_LARB1>,
2942 <&vdecsys CLK_VDEC_LARB1>;
H A Dmt8183.dtsi1956 clocks = <&vdecsys CLK_VDEC_VDEC>, <&vdecsys CLK_VDEC_LARB1>;