| /linux/include/dt-bindings/clock/ |
| H A D | exynos5410.h | 39 #define CLK_UART3 260 macro
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| H A D | actions,s500-cmu.h | 61 #define CLK_UART3 41 macro
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| H A D | actions,s700-cmu.h | 61 #define CLK_UART3 39 macro
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| H A D | actions,s900-cmu.h | 88 #define CLK_UART3 70 macro
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| H A D | exynos5250.h | 96 #define CLK_UART3 292 macro
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| H A D | sophgo,cv1800.h | 94 #define CLK_UART3 83 macro
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| H A D | s5pv210.h | 158 #define CLK_UART3 140 macro
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| H A D | exynos4.h | 153 #define CLK_UART3 315 macro
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| H A D | exynos5420.h | 69 #define CLK_UART3 260 macro
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| H A D | spacemit,k1-syscon.h | 91 #define CLK_UART3 2 macro
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| H A D | sprd,sc9860-clk.h | 88 #define CLK_UART3 5 macro
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| H A D | rockchip,rk3528-cru.h | 407 #define CLK_UART3 395 macro
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| H A D | rockchip,rk3588-cru.h | 193 #define CLK_UART3 178 macro
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| /linux/arch/arm/boot/dts/samsung/ |
| H A D | s5pv210.dtsi | 357 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
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| H A D | exynos4.dtsi | 485 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
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| H A D | exynos5420.dtsi | 1334 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
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| /linux/arch/arm64/boot/dts/actions/ |
| H A D | s700.dtsi | 143 clocks = <&cmu CLK_UART3>;
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| H A D | s900.dtsi | 149 clocks = <&cmu CLK_UART3>;
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| /linux/arch/arm/boot/dts/actions/ |
| H A D | owl-s500.dtsi | 160 clocks = <&cmu CLK_UART3>;
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| /linux/drivers/clk/actions/ |
| H A D | owl-s500.c | 492 [CLK_UART3] = &uart3_clk.common.hw,
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| H A D | owl-s700.c | 531 [CLK_UART3] = &clk_uart3.common.hw,
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| H A D | owl-s900.c | 679 [CLK_UART3] = &uart3_clk.common.hw,
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| /linux/drivers/clk/sophgo/ |
| H A D | clk-cv1800.c | 1112 [CLK_UART3] = &clk_uart3.common.hw,
1343 [CLK_UART3] = &clk_uart3.common.hw,
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| /linux/drivers/clk/rockchip/ |
| H A D | clk-rk3528.c | 220 MUX(CLK_UART3, "clk_uart3", sclk_uart3_src_p, CLK_SET_RATE_PARENT,
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| /linux/drivers/clk/renesas/ |
| H A D | r9a06g032-clocks.c | 666 D_UGATE(CLK_UART3, "clk_uart3", UART_GROUP_34567, 1,
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