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Searched refs:CLK_MM_MDP_WDMA (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt2701-mm.c45 GATE_DISP0(CLK_MM_MDP_WDMA, "mm_mdp_wdma", "mm_sel", 11),
H A Dclk-mt8167-mm.c45 GATE_MM0(CLK_MM_MDP_WDMA, "mm_mdp_wdma", "smi_mm", 7),
H A Dclk-mt6795-mm.c44 GATE_MM0(CLK_MM_MDP_WDMA, "mm_mdp_wdma", "mm_sel", 11),
H A Dclk-mt6797-mm.c44 GATE_MM0(CLK_MM_MDP_WDMA, "mm_mdp_wdma", "mm_sel", 11),
H A Dclk-mt8173-mm.c47 GATE_MM0(CLK_MM_MDP_WDMA, "mm_mdp_wdma", "mm_sel", 11),
H A Dclk-mt2712-mm.c55 GATE_MM0(CLK_MM_MDP_WDMA, "mm_mdp_wdma", "mm_sel", 11),
/linux/include/dt-bindings/clock/
H A Dmt8167-clk.h86 #define CLK_MM_MDP_WDMA 7 macro
H A Dmt6797-clk.h226 #define CLK_MM_MDP_WDMA 12 macro
H A Dmediatek,mt6795-clk.h230 #define CLK_MM_MDP_WDMA 11 macro
H A Dmt8173-clk.h258 #define CLK_MM_MDP_WDMA 11 macro
H A Dmt2712-clk.h312 #define CLK_MM_MDP_WDMA 11 macro
H A Dmt2701-clk.h364 #define CLK_MM_MDP_WDMA 12 macro
/linux/Documentation/devicetree/bindings/media/
H A Dmediatek-mdp.txt76 clocks = <&mmsys CLK_MM_MDP_WDMA>;
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi1053 clocks = <&mmsys CLK_MM_MDP_WDMA>;