1a6822483SFabien Parent // SPDX-License-Identifier: GPL-2.0 2a6822483SFabien Parent /* 3a6822483SFabien Parent * Copyright (c) 2020 MediaTek Inc. 4a6822483SFabien Parent * Copyright (c) 2020 BayLibre, SAS 5a6822483SFabien Parent * Author: James Liao <jamesjj.liao@mediatek.com> 6a6822483SFabien Parent * Fabien Parent <fparent@baylibre.com> 7a6822483SFabien Parent */ 8a6822483SFabien Parent 9a6822483SFabien Parent #include <linux/clk-provider.h> 10a96cbb14SRob Herring #include <linux/mod_devicetable.h> 11a6822483SFabien Parent #include <linux/platform_device.h> 12a6822483SFabien Parent 13a6822483SFabien Parent #include "clk-mtk.h" 14a6822483SFabien Parent #include "clk-gate.h" 15a6822483SFabien Parent 16a6822483SFabien Parent #include <dt-bindings/clock/mt8167-clk.h> 17a6822483SFabien Parent 18a6822483SFabien Parent static const struct mtk_gate_regs mm0_cg_regs = { 19a6822483SFabien Parent .set_ofs = 0x104, 20a6822483SFabien Parent .clr_ofs = 0x108, 21a6822483SFabien Parent .sta_ofs = 0x100, 22a6822483SFabien Parent }; 23a6822483SFabien Parent 24a6822483SFabien Parent static const struct mtk_gate_regs mm1_cg_regs = { 25a6822483SFabien Parent .set_ofs = 0x114, 26a6822483SFabien Parent .clr_ofs = 0x118, 27a6822483SFabien Parent .sta_ofs = 0x110, 28a6822483SFabien Parent }; 29a6822483SFabien Parent 304c85e20bSAngeloGioacchino Del Regno #define GATE_MM0(_id, _name, _parent, _shift) \ 314c85e20bSAngeloGioacchino Del Regno GATE_MTK(_id, _name, _parent, &mm0_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 32a6822483SFabien Parent 334c85e20bSAngeloGioacchino Del Regno #define GATE_MM1(_id, _name, _parent, _shift) \ 344c85e20bSAngeloGioacchino Del Regno GATE_MTK(_id, _name, _parent, &mm1_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 35a6822483SFabien Parent 36a6822483SFabien Parent static const struct mtk_gate mm_clks[] = { 37a6822483SFabien Parent /* MM0 */ 38a6822483SFabien Parent GATE_MM0(CLK_MM_SMI_COMMON, "mm_smi_common", "smi_mm", 0), 39a6822483SFabien Parent GATE_MM0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "smi_mm", 1), 40a6822483SFabien Parent GATE_MM0(CLK_MM_CAM_MDP, "mm_cam_mdp", "smi_mm", 2), 41a6822483SFabien Parent GATE_MM0(CLK_MM_MDP_RDMA, "mm_mdp_rdma", "smi_mm", 3), 42a6822483SFabien Parent GATE_MM0(CLK_MM_MDP_RSZ0, "mm_mdp_rsz0", "smi_mm", 4), 43a6822483SFabien Parent GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "smi_mm", 5), 44a6822483SFabien Parent GATE_MM0(CLK_MM_MDP_TDSHP, "mm_mdp_tdshp", "smi_mm", 6), 45a6822483SFabien Parent GATE_MM0(CLK_MM_MDP_WDMA, "mm_mdp_wdma", "smi_mm", 7), 46a6822483SFabien Parent GATE_MM0(CLK_MM_MDP_WROT, "mm_mdp_wrot", "smi_mm", 8), 47a6822483SFabien Parent GATE_MM0(CLK_MM_FAKE_ENG, "mm_fake_eng", "smi_mm", 9), 48a6822483SFabien Parent GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "smi_mm", 10), 49a6822483SFabien Parent GATE_MM0(CLK_MM_DISP_RDMA0, "mm_disp_rdma0", "smi_mm", 11), 50a6822483SFabien Parent GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "smi_mm", 12), 51a6822483SFabien Parent GATE_MM0(CLK_MM_DISP_WDMA, "mm_disp_wdma", "smi_mm", 13), 52a6822483SFabien Parent GATE_MM0(CLK_MM_DISP_COLOR, "mm_disp_color", "smi_mm", 14), 53a6822483SFabien Parent GATE_MM0(CLK_MM_DISP_CCORR, "mm_disp_ccorr", "smi_mm", 15), 54a6822483SFabien Parent GATE_MM0(CLK_MM_DISP_AAL, "mm_disp_aal", "smi_mm", 16), 55a6822483SFabien Parent GATE_MM0(CLK_MM_DISP_GAMMA, "mm_disp_gamma", "smi_mm", 17), 56a6822483SFabien Parent GATE_MM0(CLK_MM_DISP_DITHER, "mm_disp_dither", "smi_mm", 18), 57a6822483SFabien Parent GATE_MM0(CLK_MM_DISP_UFOE, "mm_disp_ufoe", "smi_mm", 19), 58a6822483SFabien Parent /* MM1 */ 59a6822483SFabien Parent GATE_MM1(CLK_MM_DISP_PWM_MM, "mm_disp_pwm_mm", "smi_mm", 0), 60a6822483SFabien Parent GATE_MM1(CLK_MM_DISP_PWM_26M, "mm_disp_pwm_26m", "smi_mm", 1), 61a6822483SFabien Parent GATE_MM1(CLK_MM_DSI_ENGINE, "mm_dsi_engine", "smi_mm", 2), 62a6822483SFabien Parent GATE_MM1(CLK_MM_DSI_DIGITAL, "mm_dsi_digital", "dsi0_lntc_dsick", 3), 63a6822483SFabien Parent GATE_MM1(CLK_MM_DPI0_ENGINE, "mm_dpi0_engine", "smi_mm", 4), 64a6822483SFabien Parent GATE_MM1(CLK_MM_DPI0_PXL, "mm_dpi0_pxl", "rg_fdpi0", 5), 65a6822483SFabien Parent GATE_MM1(CLK_MM_LVDS_PXL, "mm_lvds_pxl", "vpll_dpix", 14), 66a6822483SFabien Parent GATE_MM1(CLK_MM_LVDS_CTS, "mm_lvds_cts", "lvdstx_dig_cts", 15), 67a6822483SFabien Parent GATE_MM1(CLK_MM_DPI1_ENGINE, "mm_dpi1_engine", "smi_mm", 16), 68a6822483SFabien Parent GATE_MM1(CLK_MM_DPI1_PXL, "mm_dpi1_pxl", "rg_fdpi1", 17), 69a6822483SFabien Parent GATE_MM1(CLK_MM_HDMI_PXL, "mm_hdmi_pxl", "rg_fdpi1", 18), 70a6822483SFabien Parent GATE_MM1(CLK_MM_HDMI_SPDIF, "mm_hdmi_spdif", "apll12_div6", 19), 71a6822483SFabien Parent GATE_MM1(CLK_MM_HDMI_ADSP_BCK, "mm_hdmi_adsp_b", "apll12_div4b", 20), 72a6822483SFabien Parent GATE_MM1(CLK_MM_HDMI_PLL, "mm_hdmi_pll", "hdmtx_dig_cts", 21), 73a6822483SFabien Parent }; 74a6822483SFabien Parent 7565c10c50SAngeloGioacchino Del Regno static const struct mtk_clk_desc mm_desc = { 7665c10c50SAngeloGioacchino Del Regno .clks = mm_clks, 7765c10c50SAngeloGioacchino Del Regno .num_clks = ARRAY_SIZE(mm_clks), 78a6822483SFabien Parent }; 79a6822483SFabien Parent 8065c10c50SAngeloGioacchino Del Regno static const struct platform_device_id clk_mt8167_mm_id_table[] = { 8165c10c50SAngeloGioacchino Del Regno { .name = "clk-mt8167-mm", .driver_data = (kernel_ulong_t)&mm_desc }, 8265c10c50SAngeloGioacchino Del Regno { /* sentinel */ } 83a6822483SFabien Parent }; 8465c9ad77SAngeloGioacchino Del Regno MODULE_DEVICE_TABLE(platform, clk_mt8167_mm_id_table); 85a6822483SFabien Parent 8665c10c50SAngeloGioacchino Del Regno static struct platform_driver clk_mt8167_mm_drv = { 8765c10c50SAngeloGioacchino Del Regno .probe = mtk_clk_pdev_probe, 88*f00b45dbSUwe Kleine-König .remove = mtk_clk_pdev_remove, 89a6822483SFabien Parent .driver = { 90a6822483SFabien Parent .name = "clk-mt8167-mm", 91a6822483SFabien Parent }, 9265c10c50SAngeloGioacchino Del Regno .id_table = clk_mt8167_mm_id_table, 93a6822483SFabien Parent }; 94164d240dSAngeloGioacchino Del Regno module_platform_driver(clk_mt8167_mm_drv); 95f5100c41SAngeloGioacchino Del Regno 96f5100c41SAngeloGioacchino Del Regno MODULE_DESCRIPTION("MediaTek MT8167 MultiMedia clocks driver"); 97a451da86SAngeloGioacchino Del Regno MODULE_LICENSE("GPL"); 98