Searched refs:CLK_FPLL0 (Results 1 – 3 of 3) sorted by relevance
9 #define CLK_FPLL0 0 macro
465 static DEFINE_SG2044_PLL_RO(CLK_FPLL0, clk_fpll0, osc_parents, CLK_IS_CRITICAL,
562 clocks = <&syscon CLK_FPLL0>, <&syscon CLK_FPLL1>,