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Searched refs:C3 (Results 1 – 25 of 34) sorted by relevance

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/linux/crypto/
H A Dwp512.c317 static const u64 C3[256] = { variable
804 C3[(int)(K[5] >> 32) & 0xff] ^ in wp512_process_buffer()
814 C3[(int)(K[6] >> 32) & 0xff] ^ in wp512_process_buffer()
823 C3[(int)(K[7] >> 32) & 0xff] ^ in wp512_process_buffer()
832 C3[(int)(K[0] >> 32) & 0xff] ^ in wp512_process_buffer()
841 C3[(int)(K[1] >> 32) & 0xff] ^ in wp512_process_buffer()
850 C3[(int)(K[2] >> 32) & 0xff] ^ in wp512_process_buffer()
859 C3[(int)(K[3] >> 32) & 0xff] ^ in wp512_process_buffer()
868 C3[(int)(K[4] >> 32) & 0xff] ^ in wp512_process_buffer()
886 C3[(int)(state[5] >> 32) & 0xff] ^ in wp512_process_buffer()
[all …]
/linux/lib/crypto/s390/
H A Dchacha-s390.S457 #define C3 %v14 macro
517 VLR C3,K2
548 VAF C3,C3,D3
554 VX B3,B3,C3
586 VAF C3,C3,D3
592 VX B3,B3,C3
605 VSLDB C3,C3,C3,8
643 VAF C3,C3,D3
649 VX B3,B3,C3
681 VAF C3,C3,D3
[all …]
/linux/Documentation/userspace-api/media/v4l/
H A Dmetafmt-c3-isp.rst16 The C3 ISP can collect different statistics over an input Bayer frame.
31 sub-structs for each configurable area of the ISP, parameters for the C3-ISP
84 Amlogic C3 ISP uAPI data types
/linux/Documentation/ABI/stable/
H A Dsysfs-class-tpm97 PCR-00: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75
98 PCR-01: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75
99 PCR-02: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75
100 PCR-03: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75
101 PCR-04: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75
145 C3 91 FF 44 1E CF 7C 39 FE 17 77 21 20 BD CE 9B
/linux/arch/x86/
H A DKconfig.cpu38 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
39 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
161 bool "CyrixIII/VIA-C3"
164 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
173 bool "VIA C3-2 (Nehemiah)"
176 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
/linux/drivers/clk/meson/
H A DKconfig163 tristate "Amlogic C3 PLL clock controller"
172 AKA C3. Say Y if you want the board to work, because PLLs are the parent
176 tristate "Amlogic C3 peripherals clock controller"
186 C308L devices, AKA C3. Say Y if you want the peripherals clock to
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq4019-ap.dk04.1-c3.dts7 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1-C3";
/linux/include/media/i2c/
H A Dadv7842.h104 u16 C3; member
/linux/arch/hexagon/kernel/
H A Dvm_entry.S101 R13:12 = C3:2; } \
173 C3:2 = R13:12; }\
/linux/Documentation/hwmon/
H A Dvt1211.rst106 .. [1] Depending on the CPU (1.4V is for a VIA C3 Nehemiah).
144 VIA C3 Ezra 83.869 0.9528
145 VIA C3 Ezra-T 73.869 0.9528
/linux/arch/mips/boot/dts/pic32/
H A Dpic32mzda_sk.dts133 pins = "C3";
/linux/arch/m68k/fpsp040/
H A Dsatan.S408 |--X'+X'*Y*(C1+Y*(C2+Y*(C3+Y*(C4+Y*C5)))), X' = -1/X, Y = X'*X'
440 faddx %fp2,%fp1 | ...[Y*(C2+Z*C4)]+[C1+Z*(C3+Z*C5)]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3326-odroid-go.dtsi452 /* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */
541 /* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */
/linux/Documentation/spi/
H A Dbutterfly.rst51 SELECT J400.PB0/nSS pin 17/C3,nSELECT
/linux/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g5.c1282 #define C3 172 macro
1283 SIG_EXPR_LIST_DECL_SINGLE(C3, GPIOV4, GPIOV4, SIG_DESC_SET(SCUA0, 20));
1284 SIG_EXPR_LIST_DECL_SINGLE(C3, RMII2RXD0, RMII2, RMII2_DESC);
1285 SIG_EXPR_LIST_DECL_SINGLE(C3, RGMII2RXD0, RGMII2);
1286 PIN_DECL_(C3, SIG_EXPR_LIST_PTR(C3, GPIOV4), SIG_EXPR_LIST_PTR(C3, RMII2RXD0),
1287 SIG_EXPR_LIST_PTR(C3, RGMII2RXD0));
1310 FUNC_GROUP_DECL(RGMII2, B2, B1, A2, B3, D5, D4, C2, C1, C3, D1, D2, E6);
1311 FUNC_GROUP_DECL(RMII2, B2, B1, A2, B3, C2, C3, D1, D2, E6);
1970 ASPEED_PINCTRL_PIN(C3),
H A Dpinctrl-aspeed-g4.c199 #define C3 21 macro
200 SIG_EXPR_LIST_DECL_SINGLE(C3, SD1DAT3, SD1, SD1_DESC);
201 SIG_EXPR_LIST_DECL_SINGLE(C3, SDA12, I2C12, I2C12_DESC);
202 PIN_DECL_2(C3, GPIOC5, SD1DAT3, SDA12);
204 FUNC_GROUP_DECL(I2C12, D4, C3);
219 FUNC_GROUP_DECL(SD1, C4, B3, A2, E5, D4, C3, B2, A1);
1975 ASPEED_PINCTRL_PIN(C3),
/linux/tools/power/cpupower/po/
H A Dka.po23 msgid "Processor Core C3"
24 msgstr "პროცესორის ბირთვი C3"
31 msgid "Processor Package C3"
32 msgstr "პროცესორის პაკეტი C3"
H A Dde.po21 msgid "Processor Core C3"
22 msgstr "Prozessorkern C3"
29 msgid "Processor Package C3"
30 msgstr "Prozessorpaket C3"
H A Dcs.po24 msgid "Processor Core C3"
32 msgid "Processor Package C3"
H A Dpt.po19 msgid "Processor Core C3"
27 msgid "Processor Package C3"
/linux/arch/arm/boot/dts/gemini/
H A Dgemini-dlink-dns-313.dts235 * In the vendor Linux tree, these values are set for the C3
/linux/Documentation/admin-guide/device-mapper/
H A Dlog-writes.rst29 W1,W2,W3,C3,C2,Wflush,C1,Cflush
/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-bone-common.dtsi409 /* Support GPIO reset on revision C3 boards */
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-tyan-s7106.dts456 /*C3*/ "",
/linux/Documentation/arch/x86/
H A Dmtrr.rst53 The VIA Cyrix III and VIA C3 CPUs offer 8 Intel style MTRRs.

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