1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 27b5c5720SJerome Brunetmenu "Clock support for Amlogic platforms" 37b5c5720SJerome Brunet depends on ARCH_MESON || COMPILE_TEST 47b5c5720SJerome Brunet 5889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_REGMAP 6889c2b7eSJerome Brunet tristate 7ea11dda9SJerome Brunet select REGMAP 8*21ed19d1SJerome Brunet select MFD_SYSCON 9ea11dda9SJerome Brunet 10889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_DUALDIV 11889c2b7eSJerome Brunet tristate 12889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 13889c2b7eSJerome Brunet 14889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_MPLL 15889c2b7eSJerome Brunet tristate 16889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 17889c2b7eSJerome Brunet 18889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_PHASE 19889c2b7eSJerome Brunet tristate 20889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 21889c2b7eSJerome Brunet 22889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_PLL 23889c2b7eSJerome Brunet tristate 24889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 25889c2b7eSJerome Brunet 26889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_SCLK_DIV 27889c2b7eSJerome Brunet tristate 28889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 29889c2b7eSJerome Brunet 30889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_VID_PLL_DIV 31889c2b7eSJerome Brunet tristate 32889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 33889c2b7eSJerome Brunet 34bb5aa085SNeil Armstrongconfig COMMON_CLK_MESON_VCLK 35bb5aa085SNeil Armstrong tristate 36bb5aa085SNeil Armstrong select COMMON_CLK_MESON_REGMAP 37bb5aa085SNeil Armstrong 38230b6f3aSNeil Armstrongconfig COMMON_CLK_MESON_CLKC_UTILS 39230b6f3aSNeil Armstrong tristate 40230b6f3aSNeil Armstrong 41889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_AO_CLKC 42889c2b7eSJerome Brunet tristate 43889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 447e1723fdSNeil Armstrong select COMMON_CLK_MESON_CLKC_UTILS 45889c2b7eSJerome Brunet select RESET_CONTROLLER 46889c2b7eSJerome Brunet 476682bd4dSJerome Brunetconfig COMMON_CLK_MESON_EE_CLKC 486682bd4dSJerome Brunet tristate 496682bd4dSJerome Brunet select COMMON_CLK_MESON_REGMAP 50141fbc27SNeil Armstrong select COMMON_CLK_MESON_CLKC_UTILS 516682bd4dSJerome Brunet 5226d34431SNeil Armstrongconfig COMMON_CLK_MESON_CPU_DYNDIV 5326d34431SNeil Armstrong tristate 5426d34431SNeil Armstrong select COMMON_CLK_MESON_REGMAP 5526d34431SNeil Armstrong 56cb7c47d7SMichael Turquetteconfig COMMON_CLK_MESON8B 577b5c5720SJerome Brunet bool "Meson8 SoC Clock controller support" 587b5c5720SJerome Brunet depends on ARM 590afce85eSKrzysztof Kozlowski default ARCH_MESON 60889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 615e4e4804SNeil Armstrong select COMMON_CLK_MESON_CLKC_UTILS 62889c2b7eSJerome Brunet select COMMON_CLK_MESON_MPLL 63889c2b7eSJerome Brunet select COMMON_CLK_MESON_PLL 64889c2b7eSJerome Brunet select MFD_SYSCON 6518962172SMartin Blumenstingl select RESET_CONTROLLER 66cb7c47d7SMichael Turquette help 67855f06a1SMartin Blumenstingl Support for the clock controller on AmLogic S802 (Meson8), 68855f06a1SMartin Blumenstingl S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you 69855f06a1SMartin Blumenstingl want peripherals and CPU frequency scaling to work. 70738f66d3SMichael Turquette 71738f66d3SMichael Turquetteconfig COMMON_CLK_GXBB 7220425f63SKevin Hilman tristate "GXBB and GXL SoC clock controllers support" 737b5c5720SJerome Brunet depends on ARM64 740afce85eSKrzysztof Kozlowski default ARCH_MESON 75889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 76889c2b7eSJerome Brunet select COMMON_CLK_MESON_DUALDIV 77889c2b7eSJerome Brunet select COMMON_CLK_MESON_VID_PLL_DIV 78889c2b7eSJerome Brunet select COMMON_CLK_MESON_MPLL 79889c2b7eSJerome Brunet select COMMON_CLK_MESON_PLL 80889c2b7eSJerome Brunet select COMMON_CLK_MESON_AO_CLKC 816682bd4dSJerome Brunet select COMMON_CLK_MESON_EE_CLKC 824162dd5bSJerome Brunet select MFD_SYSCON 83738f66d3SMichael Turquette help 84738f66d3SMichael Turquette Support for the clock controller on AmLogic S905 devices, aka gxbb. 85738f66d3SMichael Turquette Say Y if you want peripherals and CPU frequency scaling to work. 8678b4af31SQiufang Dai 8778b4af31SQiufang Daiconfig COMMON_CLK_AXG 8820425f63SKevin Hilman tristate "AXG SoC clock controllers support" 897b5c5720SJerome Brunet depends on ARM64 900afce85eSKrzysztof Kozlowski default ARCH_MESON 91889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 92889c2b7eSJerome Brunet select COMMON_CLK_MESON_DUALDIV 93889c2b7eSJerome Brunet select COMMON_CLK_MESON_MPLL 94889c2b7eSJerome Brunet select COMMON_CLK_MESON_PLL 95889c2b7eSJerome Brunet select COMMON_CLK_MESON_AO_CLKC 966682bd4dSJerome Brunet select COMMON_CLK_MESON_EE_CLKC 974162dd5bSJerome Brunet select MFD_SYSCON 9878b4af31SQiufang Dai help 9978b4af31SQiufang Dai Support for the clock controller on AmLogic A113D devices, aka axg. 10078b4af31SQiufang Dai Say Y if you want peripherals and CPU frequency scaling to work. 1011cd50181SJerome Brunet 1021cd50181SJerome Brunetconfig COMMON_CLK_AXG_AUDIO 1031cd50181SJerome Brunet tristate "Meson AXG Audio Clock Controller Driver" 1047b5c5720SJerome Brunet depends on ARM64 105889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 106889c2b7eSJerome Brunet select COMMON_CLK_MESON_PHASE 107889c2b7eSJerome Brunet select COMMON_CLK_MESON_SCLK_DIV 10805d3b7c6SNeil Armstrong select COMMON_CLK_MESON_CLKC_UTILS 109cb78ba76SJerome Brunet select REGMAP_MMIO 110301b96e0SJerome Brunet select AUXILIARY_BUS 111301b96e0SJerome Brunet imply RESET_MESON_AUX 1121cd50181SJerome Brunet help 1131cd50181SJerome Brunet Support for the audio clock controller on AmLogic A113D devices, 1141cd50181SJerome Brunet aka axg, Say Y if you want audio subsystem to work. 115085a4ea9SJian Hu 11628f3be51SDmitry Rokosovconfig COMMON_CLK_A1_PLL 11728f3be51SDmitry Rokosov tristate "Amlogic A1 SoC PLL controller support" 11828f3be51SDmitry Rokosov depends on ARM64 11928f3be51SDmitry Rokosov select COMMON_CLK_MESON_REGMAP 120c3f2801bSNeil Armstrong select COMMON_CLK_MESON_CLKC_UTILS 12128f3be51SDmitry Rokosov select COMMON_CLK_MESON_PLL 12228f3be51SDmitry Rokosov help 12328f3be51SDmitry Rokosov Support for the PLL clock controller on Amlogic A113L based 12428f3be51SDmitry Rokosov device, A1 SoC Family. Say Y if you want A1 PLL clock controller 12528f3be51SDmitry Rokosov to work. 12628f3be51SDmitry Rokosov 12784af9144SDmitry Rokosovconfig COMMON_CLK_A1_PERIPHERALS 12884af9144SDmitry Rokosov tristate "Amlogic A1 SoC Peripherals clock controller support" 12984af9144SDmitry Rokosov depends on ARM64 13084af9144SDmitry Rokosov select COMMON_CLK_MESON_DUALDIV 13184af9144SDmitry Rokosov select COMMON_CLK_MESON_REGMAP 132c3f2801bSNeil Armstrong select COMMON_CLK_MESON_CLKC_UTILS 13384af9144SDmitry Rokosov help 13484af9144SDmitry Rokosov Support for the Peripherals clock controller on Amlogic A113L based 13584af9144SDmitry Rokosov device, A1 SoC Family. Say Y if you want A1 Peripherals clock 13684af9144SDmitry Rokosov controller to work. 13784af9144SDmitry Rokosov 1388a9a129dSXianwei Zhaoconfig COMMON_CLK_C3_PLL 1398a9a129dSXianwei Zhao tristate "Amlogic C3 PLL clock controller" 1408a9a129dSXianwei Zhao depends on ARM64 1410afce85eSKrzysztof Kozlowski default ARCH_MESON 1428a9a129dSXianwei Zhao select COMMON_CLK_MESON_REGMAP 1438a9a129dSXianwei Zhao select COMMON_CLK_MESON_PLL 1448a9a129dSXianwei Zhao select COMMON_CLK_MESON_CLKC_UTILS 1458a9a129dSXianwei Zhao imply COMMON_CLK_SCMI 1468a9a129dSXianwei Zhao help 1478a9a129dSXianwei Zhao Support for the PLL clock controller on Amlogic C302X and C308L devices, 1488a9a129dSXianwei Zhao AKA C3. Say Y if you want the board to work, because PLLs are the parent 1498a9a129dSXianwei Zhao of most peripherals. 1508a9a129dSXianwei Zhao 151f06ac3edSXianwei Zhaoconfig COMMON_CLK_C3_PERIPHERALS 152f06ac3edSXianwei Zhao tristate "Amlogic C3 peripherals clock controller" 153f06ac3edSXianwei Zhao depends on ARM64 1540afce85eSKrzysztof Kozlowski default ARCH_MESON 155f06ac3edSXianwei Zhao select COMMON_CLK_MESON_REGMAP 156f06ac3edSXianwei Zhao select COMMON_CLK_MESON_DUALDIV 157f06ac3edSXianwei Zhao select COMMON_CLK_MESON_CLKC_UTILS 158f06ac3edSXianwei Zhao imply COMMON_CLK_SCMI 159f06ac3edSXianwei Zhao imply COMMON_CLK_C3_PLL 160f06ac3edSXianwei Zhao help 161f06ac3edSXianwei Zhao Support for the Peripherals clock controller on Amlogic C302X and 162f06ac3edSXianwei Zhao C308L devices, AKA C3. Say Y if you want the peripherals clock to 163f06ac3edSXianwei Zhao work. 164f06ac3edSXianwei Zhao 165085a4ea9SJian Huconfig COMMON_CLK_G12A 16620425f63SKevin Hilman tristate "G12 and SM1 SoC clock controllers support" 1677b5c5720SJerome Brunet depends on ARM64 1680afce85eSKrzysztof Kozlowski default ARCH_MESON 169085a4ea9SJian Hu select COMMON_CLK_MESON_REGMAP 170042f01bbSNeil Armstrong select COMMON_CLK_MESON_DUALDIV 171085a4ea9SJian Hu select COMMON_CLK_MESON_MPLL 172085a4ea9SJian Hu select COMMON_CLK_MESON_PLL 173042f01bbSNeil Armstrong select COMMON_CLK_MESON_AO_CLKC 1746682bd4dSJerome Brunet select COMMON_CLK_MESON_EE_CLKC 17526d34431SNeil Armstrong select COMMON_CLK_MESON_CPU_DYNDIV 176bae69bfaSKevin Hilman select COMMON_CLK_MESON_VID_PLL_DIV 177b70cb1a2SNeil Armstrong select COMMON_CLK_MESON_VCLK 178085a4ea9SJian Hu select MFD_SYSCON 179085a4ea9SJian Hu help 180085a4ea9SJian Hu Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2 181085a4ea9SJian Hu devices, aka g12a. Say Y if you want peripherals to work. 182e787c9c5SYu Tu 183e787c9c5SYu Tuconfig COMMON_CLK_S4_PLL 184e787c9c5SYu Tu tristate "S4 SoC PLL clock controllers support" 185e787c9c5SYu Tu depends on ARM64 1860afce85eSKrzysztof Kozlowski default ARCH_MESON 18798408df6SArnd Bergmann select COMMON_CLK_MESON_CLKC_UTILS 188e787c9c5SYu Tu select COMMON_CLK_MESON_MPLL 189e787c9c5SYu Tu select COMMON_CLK_MESON_PLL 190e787c9c5SYu Tu select COMMON_CLK_MESON_REGMAP 191e787c9c5SYu Tu help 192e787c9c5SYu Tu Support for the PLL clock controller on Amlogic S805X2 and S905Y4 devices, 193e787c9c5SYu Tu AKA S4. Say Y if you want the board to work, because PLLs are the parent of 194e787c9c5SYu Tu most peripherals. 19557b55c76SYu Tu 19657b55c76SYu Tuconfig COMMON_CLK_S4_PERIPHERALS 19757b55c76SYu Tu tristate "S4 SoC peripherals clock controllers support" 19857b55c76SYu Tu depends on ARM64 1990afce85eSKrzysztof Kozlowski default ARCH_MESON 20098408df6SArnd Bergmann select COMMON_CLK_MESON_CLKC_UTILS 20157b55c76SYu Tu select COMMON_CLK_MESON_REGMAP 20257b55c76SYu Tu select COMMON_CLK_MESON_DUALDIV 20357b55c76SYu Tu select COMMON_CLK_MESON_VID_PLL_DIV 20457b55c76SYu Tu help 20557b55c76SYu Tu Support for the peripherals clock controller on Amlogic S805X2 and S905Y4 20657b55c76SYu Tu devices, AKA S4. Say Y if you want S4 peripherals clock controller to work. 2077b5c5720SJerome Brunetendmenu 208