1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 27b5c5720SJerome Brunetmenu "Clock support for Amlogic platforms" 37b5c5720SJerome Brunet depends on ARCH_MESON || COMPILE_TEST 47b5c5720SJerome Brunet 5889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_REGMAP 6889c2b7eSJerome Brunet tristate 7ea11dda9SJerome Brunet select REGMAP 8ea11dda9SJerome Brunet 9889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_DUALDIV 10889c2b7eSJerome Brunet tristate 11889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 12889c2b7eSJerome Brunet 13889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_MPLL 14889c2b7eSJerome Brunet tristate 15889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 16889c2b7eSJerome Brunet 17889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_PHASE 18889c2b7eSJerome Brunet tristate 19889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 20889c2b7eSJerome Brunet 21889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_PLL 22889c2b7eSJerome Brunet tristate 23889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 24889c2b7eSJerome Brunet 25889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_SCLK_DIV 26889c2b7eSJerome Brunet tristate 27889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 28889c2b7eSJerome Brunet 29889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_VID_PLL_DIV 30889c2b7eSJerome Brunet tristate 31889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 32889c2b7eSJerome Brunet 33bb5aa085SNeil Armstrongconfig COMMON_CLK_MESON_VCLK 34bb5aa085SNeil Armstrong tristate 35bb5aa085SNeil Armstrong select COMMON_CLK_MESON_REGMAP 36bb5aa085SNeil Armstrong 37230b6f3aSNeil Armstrongconfig COMMON_CLK_MESON_CLKC_UTILS 38230b6f3aSNeil Armstrong tristate 39230b6f3aSNeil Armstrong 40889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_AO_CLKC 41889c2b7eSJerome Brunet tristate 42889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 437e1723fdSNeil Armstrong select COMMON_CLK_MESON_CLKC_UTILS 44889c2b7eSJerome Brunet select RESET_CONTROLLER 45889c2b7eSJerome Brunet 466682bd4dSJerome Brunetconfig COMMON_CLK_MESON_EE_CLKC 476682bd4dSJerome Brunet tristate 486682bd4dSJerome Brunet select COMMON_CLK_MESON_REGMAP 49141fbc27SNeil Armstrong select COMMON_CLK_MESON_CLKC_UTILS 506682bd4dSJerome Brunet 5126d34431SNeil Armstrongconfig COMMON_CLK_MESON_CPU_DYNDIV 5226d34431SNeil Armstrong tristate 5326d34431SNeil Armstrong select COMMON_CLK_MESON_REGMAP 5426d34431SNeil Armstrong 55cb7c47d7SMichael Turquetteconfig COMMON_CLK_MESON8B 567b5c5720SJerome Brunet bool "Meson8 SoC Clock controller support" 577b5c5720SJerome Brunet depends on ARM 587b5c5720SJerome Brunet default y 59889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 605e4e4804SNeil Armstrong select COMMON_CLK_MESON_CLKC_UTILS 61889c2b7eSJerome Brunet select COMMON_CLK_MESON_MPLL 62889c2b7eSJerome Brunet select COMMON_CLK_MESON_PLL 63889c2b7eSJerome Brunet select MFD_SYSCON 6418962172SMartin Blumenstingl select RESET_CONTROLLER 65cb7c47d7SMichael Turquette help 66855f06a1SMartin Blumenstingl Support for the clock controller on AmLogic S802 (Meson8), 67855f06a1SMartin Blumenstingl S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you 68855f06a1SMartin Blumenstingl want peripherals and CPU frequency scaling to work. 69738f66d3SMichael Turquette 70738f66d3SMichael Turquetteconfig COMMON_CLK_GXBB 7120425f63SKevin Hilman tristate "GXBB and GXL SoC clock controllers support" 727b5c5720SJerome Brunet depends on ARM64 737b5c5720SJerome Brunet default y 74889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 75889c2b7eSJerome Brunet select COMMON_CLK_MESON_DUALDIV 76889c2b7eSJerome Brunet select COMMON_CLK_MESON_VID_PLL_DIV 77889c2b7eSJerome Brunet select COMMON_CLK_MESON_MPLL 78889c2b7eSJerome Brunet select COMMON_CLK_MESON_PLL 79889c2b7eSJerome Brunet select COMMON_CLK_MESON_AO_CLKC 806682bd4dSJerome Brunet select COMMON_CLK_MESON_EE_CLKC 814162dd5bSJerome Brunet select MFD_SYSCON 82738f66d3SMichael Turquette help 83738f66d3SMichael Turquette Support for the clock controller on AmLogic S905 devices, aka gxbb. 84738f66d3SMichael Turquette Say Y if you want peripherals and CPU frequency scaling to work. 8578b4af31SQiufang Dai 8678b4af31SQiufang Daiconfig COMMON_CLK_AXG 8720425f63SKevin Hilman tristate "AXG SoC clock controllers support" 887b5c5720SJerome Brunet depends on ARM64 897b5c5720SJerome Brunet default y 90889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 91889c2b7eSJerome Brunet select COMMON_CLK_MESON_DUALDIV 92889c2b7eSJerome Brunet select COMMON_CLK_MESON_MPLL 93889c2b7eSJerome Brunet select COMMON_CLK_MESON_PLL 94889c2b7eSJerome Brunet select COMMON_CLK_MESON_AO_CLKC 956682bd4dSJerome Brunet select COMMON_CLK_MESON_EE_CLKC 964162dd5bSJerome Brunet select MFD_SYSCON 9778b4af31SQiufang Dai help 9878b4af31SQiufang Dai Support for the clock controller on AmLogic A113D devices, aka axg. 9978b4af31SQiufang Dai Say Y if you want peripherals and CPU frequency scaling to work. 1001cd50181SJerome Brunet 1011cd50181SJerome Brunetconfig COMMON_CLK_AXG_AUDIO 1021cd50181SJerome Brunet tristate "Meson AXG Audio Clock Controller Driver" 1037b5c5720SJerome Brunet depends on ARM64 104889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 105889c2b7eSJerome Brunet select COMMON_CLK_MESON_PHASE 106889c2b7eSJerome Brunet select COMMON_CLK_MESON_SCLK_DIV 10705d3b7c6SNeil Armstrong select COMMON_CLK_MESON_CLKC_UTILS 108cb78ba76SJerome Brunet select REGMAP_MMIO 109*5ae1a434SJerome Brunet select RESET_CONTROLLER 1101cd50181SJerome Brunet help 1111cd50181SJerome Brunet Support for the audio clock controller on AmLogic A113D devices, 1121cd50181SJerome Brunet aka axg, Say Y if you want audio subsystem to work. 113085a4ea9SJian Hu 11428f3be51SDmitry Rokosovconfig COMMON_CLK_A1_PLL 11528f3be51SDmitry Rokosov tristate "Amlogic A1 SoC PLL controller support" 11628f3be51SDmitry Rokosov depends on ARM64 11728f3be51SDmitry Rokosov select COMMON_CLK_MESON_REGMAP 118c3f2801bSNeil Armstrong select COMMON_CLK_MESON_CLKC_UTILS 11928f3be51SDmitry Rokosov select COMMON_CLK_MESON_PLL 12028f3be51SDmitry Rokosov help 12128f3be51SDmitry Rokosov Support for the PLL clock controller on Amlogic A113L based 12228f3be51SDmitry Rokosov device, A1 SoC Family. Say Y if you want A1 PLL clock controller 12328f3be51SDmitry Rokosov to work. 12428f3be51SDmitry Rokosov 12584af9144SDmitry Rokosovconfig COMMON_CLK_A1_PERIPHERALS 12684af9144SDmitry Rokosov tristate "Amlogic A1 SoC Peripherals clock controller support" 12784af9144SDmitry Rokosov depends on ARM64 12884af9144SDmitry Rokosov select COMMON_CLK_MESON_DUALDIV 12984af9144SDmitry Rokosov select COMMON_CLK_MESON_REGMAP 130c3f2801bSNeil Armstrong select COMMON_CLK_MESON_CLKC_UTILS 13184af9144SDmitry Rokosov help 13284af9144SDmitry Rokosov Support for the Peripherals clock controller on Amlogic A113L based 13384af9144SDmitry Rokosov device, A1 SoC Family. Say Y if you want A1 Peripherals clock 13484af9144SDmitry Rokosov controller to work. 13584af9144SDmitry Rokosov 1368a9a129dSXianwei Zhaoconfig COMMON_CLK_C3_PLL 1378a9a129dSXianwei Zhao tristate "Amlogic C3 PLL clock controller" 1388a9a129dSXianwei Zhao depends on ARM64 1398a9a129dSXianwei Zhao default y 1408a9a129dSXianwei Zhao select COMMON_CLK_MESON_REGMAP 1418a9a129dSXianwei Zhao select COMMON_CLK_MESON_PLL 1428a9a129dSXianwei Zhao select COMMON_CLK_MESON_CLKC_UTILS 1438a9a129dSXianwei Zhao imply COMMON_CLK_SCMI 1448a9a129dSXianwei Zhao help 1458a9a129dSXianwei Zhao Support for the PLL clock controller on Amlogic C302X and C308L devices, 1468a9a129dSXianwei Zhao AKA C3. Say Y if you want the board to work, because PLLs are the parent 1478a9a129dSXianwei Zhao of most peripherals. 1488a9a129dSXianwei Zhao 149f06ac3edSXianwei Zhaoconfig COMMON_CLK_C3_PERIPHERALS 150f06ac3edSXianwei Zhao tristate "Amlogic C3 peripherals clock controller" 151f06ac3edSXianwei Zhao depends on ARM64 152f06ac3edSXianwei Zhao default y 153f06ac3edSXianwei Zhao select COMMON_CLK_MESON_REGMAP 154f06ac3edSXianwei Zhao select COMMON_CLK_MESON_DUALDIV 155f06ac3edSXianwei Zhao select COMMON_CLK_MESON_CLKC_UTILS 156f06ac3edSXianwei Zhao imply COMMON_CLK_SCMI 157f06ac3edSXianwei Zhao imply COMMON_CLK_C3_PLL 158f06ac3edSXianwei Zhao help 159f06ac3edSXianwei Zhao Support for the Peripherals clock controller on Amlogic C302X and 160f06ac3edSXianwei Zhao C308L devices, AKA C3. Say Y if you want the peripherals clock to 161f06ac3edSXianwei Zhao work. 162f06ac3edSXianwei Zhao 163085a4ea9SJian Huconfig COMMON_CLK_G12A 16420425f63SKevin Hilman tristate "G12 and SM1 SoC clock controllers support" 1657b5c5720SJerome Brunet depends on ARM64 1667b5c5720SJerome Brunet default y 167085a4ea9SJian Hu select COMMON_CLK_MESON_REGMAP 168042f01bbSNeil Armstrong select COMMON_CLK_MESON_DUALDIV 169085a4ea9SJian Hu select COMMON_CLK_MESON_MPLL 170085a4ea9SJian Hu select COMMON_CLK_MESON_PLL 171042f01bbSNeil Armstrong select COMMON_CLK_MESON_AO_CLKC 1726682bd4dSJerome Brunet select COMMON_CLK_MESON_EE_CLKC 17326d34431SNeil Armstrong select COMMON_CLK_MESON_CPU_DYNDIV 174bae69bfaSKevin Hilman select COMMON_CLK_MESON_VID_PLL_DIV 175b70cb1a2SNeil Armstrong select COMMON_CLK_MESON_VCLK 176085a4ea9SJian Hu select MFD_SYSCON 177085a4ea9SJian Hu help 178085a4ea9SJian Hu Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2 179085a4ea9SJian Hu devices, aka g12a. Say Y if you want peripherals to work. 180e787c9c5SYu Tu 181e787c9c5SYu Tuconfig COMMON_CLK_S4_PLL 182e787c9c5SYu Tu tristate "S4 SoC PLL clock controllers support" 183e787c9c5SYu Tu depends on ARM64 184e787c9c5SYu Tu default y 18598408df6SArnd Bergmann select COMMON_CLK_MESON_CLKC_UTILS 186e787c9c5SYu Tu select COMMON_CLK_MESON_MPLL 187e787c9c5SYu Tu select COMMON_CLK_MESON_PLL 188e787c9c5SYu Tu select COMMON_CLK_MESON_REGMAP 189e787c9c5SYu Tu help 190e787c9c5SYu Tu Support for the PLL clock controller on Amlogic S805X2 and S905Y4 devices, 191e787c9c5SYu Tu AKA S4. Say Y if you want the board to work, because PLLs are the parent of 192e787c9c5SYu Tu most peripherals. 19357b55c76SYu Tu 19457b55c76SYu Tuconfig COMMON_CLK_S4_PERIPHERALS 19557b55c76SYu Tu tristate "S4 SoC peripherals clock controllers support" 19657b55c76SYu Tu depends on ARM64 19757b55c76SYu Tu default y 19898408df6SArnd Bergmann select COMMON_CLK_MESON_CLKC_UTILS 19957b55c76SYu Tu select COMMON_CLK_MESON_REGMAP 20057b55c76SYu Tu select COMMON_CLK_MESON_DUALDIV 20157b55c76SYu Tu select COMMON_CLK_MESON_VID_PLL_DIV 20257b55c76SYu Tu help 20357b55c76SYu Tu Support for the peripherals clock controller on Amlogic S805X2 and S905Y4 20457b55c76SYu Tu devices, AKA S4. Say Y if you want S4 peripherals clock controller to work. 2057b5c5720SJerome Brunetendmenu 206