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Searched refs:A8 (Results 1 – 25 of 36) sorted by relevance

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/linux/arch/arm/boot/dts/arm/
H A Darm-realview-pba8.dts27 model = "ARM RealView Platform Baseboard for Cortex-A8";
/linux/Documentation/ABI/stable/
H A Dsysfs-class-tpm139 A7 1F 3C A8 D0 12 15 3E CA 0E BD FA 24 CD 33 C6
144 F7 02 71 CF 15 AE 16 DD D1 C1 8E A8 CF 9B 50 7B
/linux/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g7-soc1.c208 A8, enumerator
483 PIN(A8),
757 [F11] = 78, [F13] = 79, [N15] = 80, [C20] = 81, [C19] = 82, [A8] = 83, [R14] = 84,
1081 PIN_GROUP(RGMII0, C20, C19, A8, R14, A7, P14, D20, A6, B6, N14, B7, B8);
1083 PIN_GROUP(RMII0, C20, A8, R14, A7, P14, A6, B6, N14);
H A Dpinctrl-aspeed-g4.c468 #define A8 56 macro
471 SIG_EXPR_LIST_DECL_DUAL(A8, ROMD8, ROM16, ROM16S);
472 SIG_EXPR_LIST_DECL_SINGLE(A8, NCTS6, NCTS6, UART6_DESC);
473 PIN_DECL_2(A8, GPIOH0, ROMD8, NCTS6);
524 FUNC_GROUP_DECL(UART6, A8, C7, B7, A7, D7, B6, A6, E7);
1852 A8, C7, B7, A7, D7, B6, A6, E7, W21, Y22, U19, R22, P18, P19,
1923 ASPEED_PINCTRL_PIN(A8),
2451 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, A8, E7, SCU8C, 23),
2452 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, A8, E7, SCU8C, 23),
H A Dpinctrl-aspeed-g5.c1857 #define A8 233 macro
1858 SIG_EXPR_LIST_DECL_SINGLE(A8, USB2AHDN, USB2AH, SIG_DESC_SET(SCU90, 29));
1859 SIG_EXPR_LIST_DECL_SINGLE(A8, USB2ADDN, USB2AD, SIG_DESC_BIT(SCU90, 29, 0));
1860 PIN_DECL_(A8, SIG_EXPR_LIST_PTR(A8, USB2AHDN), SIG_EXPR_LIST_PTR(A8, USB2ADDN));
1862 FUNC_GROUP_DECL(USB2AH, A7, A8);
1863 FUNC_GROUP_DECL(USB2AD, A7, A8);
1919 ASPEED_PINCTRL_PIN(A8),
/linux/Documentation/arch/arm/
H A Dsunxi.rst20 * ARM Cortex-A8 based SoCs
/linux/lib/crypto/arm/
H A Dsha1-armv4-large.S50 @ issue Cortex A8 core was measured to process input block in
56 @ Cortex A8 core and in absolute terms ~870 cycles per input block
62 @ improvement on Cortex A8 core and 12.2 cycles per byte.
/linux/Documentation/hwmon/
H A Dk10temp.rst20 * AMD Family 12h processors: "Llano" (E2/A4/A6/A8-Series)
/linux/Documentation/admin-guide/media/
H A Dvisl.rst163 00000040: e8c3 4320 b4ba a226 cbc1 4138 3a12 32d6 ..C ...&..A8:.2.
/linux/arch/arm/mm/
H A Dproc-v7.S501 ldr r10, =0x00000c08 @ Cortex-A8 primary part number
591 @ Cortex-A8 - always needs bpiall switch_mm implementation
/linux/arch/arm64/boot/dts/apple/
H A Dt7000-pmgr.dtsi3 * PMGR Power domains for the Apple T7000 "A8" SoC
/linux/Documentation/block/
H A Dbfq-iosched.rst46 - AMD A8-3850: 250 KIOPS
55 - AMD A8-3850: 200 KIOPS
/linux/arch/m68k/fpsp040/
H A Dbindec.S61 | A8. Clr INEX; Force RZ.
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am625-beagleplay.dts518 AM62X_MCU_IOPAD(0x0044, PIN_INPUT, 0) /* (A8) MCU_I2C0_SCL */
/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c171 #define IP1_3_0 FM(DU_DG4) F_(0, 0) F_(0, 0) FM(A8) FM(FSO_CFE_0_N_A) F_(0, 0) F_(0, 0) F_(0, …
427 PINMUX_IPSR_GPSR(IP1_3_0, A8),
H A Dpfc-r8a77980.c205 #define IP1_3_0 FM(DU_DG4) FM(SCL5) F_(0, 0) FM(A8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,…
502 PINMUX_IPSR_GPSR(IP1_3_0, A8),
H A Dpfc-r8a77990.c102 #define GPSR1_8 F_(A8, IP3_31_28)
245 #define IP3_31_28 FM(A8) FM(SDA6_A) FM(RX3_B) FM(HRX4_C) FM(VI5_HSYNC_N_A) FM(DU_HSYNC) FM(VI4…
721 PINMUX_IPSR_GPSR(IP3_31_28, A8),
H A Dpfc-sh7734.c630 PINMUX_IPSR_GPSR(IP0_17_16, A8),
1379 GPIO_FN(A8), GPIO_FN(ST0_D4), GPIO_FN(LCD_DATA8_A),
H A Dpfc-r8a77965.c124 #define GPSR1_8 F_(A8, IP2_31_28)
281 #define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(…
800 PINMUX_IPSR_GPSR(IP2_31_28, A8),
H A Dpfc-r8a77951.c119 #define GPSR1_8 F_(A8, IP2_31_28)
278 #define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(…
794 PINMUX_IPSR_GPSR(IP2_31_28, A8),
H A Dpfc-r8a7796.c124 #define GPSR1_8 F_(A8, IP2_31_28)
281 #define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(…
798 PINMUX_IPSR_GPSR(IP2_31_28, A8),
H A Dpfc-r8a779a0.c366 #define IP1SR1_3_0 FM(MSIOF0_SCK) F_(0, 0) F_(0, 0) F_(0, 0) FM(DU_DR4) FM(A8) F_(0, 0) F_(0, 0) F…
825 PINMUX_IPSR_GPSR(IP1SR1_3_0, A8),
H A Dpfc-r8a7792.c381 PINMUX_SINGLE(A8),
H A Dpfc-sh7264.c1278 GPIO_FN(A8),
/linux/Documentation/driver-api/
H A Dpin-control.rst65 PINCTRL_PIN(0, "A8"),
436 In this 8x8 BGA package the pins { A8, A7, A6, A5 } can be used as an SPI port
486 The Function spi is associated with pin groups { A8, A7, A6, A5 }

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