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Searched refs:MASK (Results 1 – 25 of 91) sorted by relevance

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/linux/sound/soc/codecs/
H A Dak4613.c425 #define MASK(x) (1 << AK4613_CHANNEL_##x) in ak4613_hw_constraints() macro
428 [AK4613_CONFIG_MODE_STEREO] = { MASK(2), MASK(2), MASK(2), MASK(2)}, in ak4613_hw_constraints()
429 [AK4613_CONFIG_MODE_TDM512] = { MASK(4), MASK(12), MASK(12), MASK(12)}, in ak4613_hw_constraints()
430 [AK4613_CONFIG_MODE_TDM256] = { MASK( in ak4613_hw_constraints()
[all...]
/linux/arch/arm/mach-rpc/
H A Dirq.c15 #define MASK 0x08 macro
130 val = readb(base + MASK); in iomd_irq_mask_ack()
131 writeb(val & ~mask, base + MASK); in iomd_irq_mask_ack()
140 val = readb(base + MASK); in iomd_irq_mask()
141 writeb(val & ~mask, base + MASK); in iomd_irq_mask()
149 val = readb(base + MASK); in iomd_irq_unmask()
150 writeb(val | mask, base + MASK); in iomd_irq_unmask()
/linux/tools/testing/selftests/bpf/progs/
H A Dtest_pkt_md_access.c11 #define TEST_FIELD(TYPE, FIELD, MASK) \ argument
14 if (tmp != ((*(volatile __u32 *)&skb->FIELD) & MASK)) \
19 #define TEST_FIELD(TYPE, FIELD, MASK) \ argument
23 if (tmp != ((*(volatile __u32 *)&skb->FIELD) & MASK)) \
/linux/lib/crypto/x86/
H A Dpoly1305-x86_64-cryptogams.pl419 my ($H0,$H1,$H2,$H3,$H4, $T0,$T1,$T2,$T3,$T4, $D0,$D1,$D2,$D3,$D4, $MASK) =
888 vmovdqa 64(%rcx),$MASK # .Lmask26
898 vpand $MASK,$T0,$T0 # 0
900 vpand $MASK,$T1,$T1 # 1
902 vpand $MASK,$T2,$T2 # 2
903 vpand $MASK,$T3,$T3 # 3
1052 vpand $MASK,$H0,$H0 # 0
1054 vpand $MASK,$H1,$H1 # 1
1057 vpand $MASK,$H2,$H2 # 2
1058 vpand $MASK,$H3,$H3 # 3
[all …]
/linux/drivers/scsi/sym53c8xx_2/
H A Dsym_fw2.h228 SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
316 SCR_INT ^ IFTRUE (MASK (HX_DMAP_DIRTY, HX_DMAP_DIRTY)),
348 SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
438 SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
462 SCR_JUMP ^ IFTRUE (MASK (WSR, WSR)),
521 SCR_JUMP ^ IFTRUE (MASK (WSS, WSS)),
681 SCR_JUMP ^ IFFALSE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),
898 SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
904 SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
1073 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
[all …]
H A Dsym_fw1.h236 SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
363 SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
453 SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
478 SCR_JUMP ^ IFTRUE (MASK (WSR, WSR)),
538 SCR_JUMP ^ IFTRUE (MASK (WSS, WSS)),
704 SCR_JUMP ^ IFFALSE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),
949 SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
955 SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
1187 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
1207 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
[all …]
/linux/tools/testing/selftests/net/
H A Dmsg_zerocopy.sh57 readonly MASK="24"
63 readonly MASK="64"
116 ip -netns "${NS1}" addr add "${SADDR}/${MASK}" dev "${DEV}" ${NODAD}
117 ip -netns "${NS2}" addr add "${DADDR}/${MASK}" dev "${DEV}" ${NODAD}
118 ip -netns "${NS2}" addr add "${DUMMY_ADDR}/${MASK}" dev "${DUMMY_DEV}" ${NODAD}
/linux/lib/crypto/arm/
H A Dpoly1305-armv4.pl495 my ($T0,$T1,$MASK) = map("q$_",(15,4,0));
1100 vorn $MASK,$MASK,$MASK @ all-ones, can be redundant
1102 vshr.u64 $MASK,$MASK,#38
1144 vorn $MASK,$MASK,$MASK @ all-ones
1146 vshr.u64 $MASK,$MASK,#38
1165 vand.i64 $D3,$D3,$MASK
1167 vand.i64 $D0,$D0,$MASK
1172 vand.i64 $D4,$D4,$MASK
1174 vand.i64 $D1,$D1,$MASK
1180 vand.i64 $D2,$D2,$MASK
[all …]
/linux/drivers/gpu/drm/hisilicon/kirin/
H A Dkirin_ade_reg.h13 #define MASK(x) (BIT_ULL(x) - 1) macro
17 #define FRM_END_START_MASK MASK(2)
50 #define CH_OVLY_SEL_MASK MASK(2)
99 #define QOSGENERATOR_MODE_MASK MASK(2)
/linux/lib/crypto/arm64/
H A Dpoly1305-armv8.pl270 my ($T0,$T1,$MASK) = map("v$_",(29..31));
546 movi $MASK.2d,#-1
550 ushr $MASK.2d,$MASK.2d,#38
712 and $ACC0,$ACC0,$MASK.2d
852 and $ACC3,$ACC3,$MASK.2d
854 and $ACC0,$ACC0,$MASK.2d
860 and $ACC4,$ACC4,$MASK.2d
862 and $ACC1,$ACC1,$MASK.2d
868 and $ACC2,$ACC2,$MASK.2d
873 and $ACC0,$ACC0,$MASK.2d
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dgm20b.c42 (MASK(GPCPLL_CFG2_SDM_DIN_WIDTH) << GPCPLL_CFG2_SDM_DIN_SHIFT)
46 (MASK(GPCPLL_CFG2_SDM_DIN_NEW_WIDTH) << GPCPLL_CFG2_SDM_DIN_NEW_SHIFT)
54 (MASK(GPCPLL_DVFS0_DFS_COEFF_WIDTH) << GPCPLL_DVFS0_DFS_COEFF_SHIFT)
58 (MASK(GPCPLL_DVFS0_DFS_DET_MAX_WIDTH) << GPCPLL_DVFS0_DFS_DET_MAX_SHIFT)
170 MASK(GPCPLL_CFG2_SDM_DIN_WIDTH); in gm20b_pllg_read_mnp()
202 dvfs->dfs_coeff = min_t(u32, coeff, MASK(GPCPLL_DVFS0_DFS_COEFF_WIDTH)); in gm20b_dvfs_calc_det_coeff()
255 rem = ((u32)n) & MASK(DFS_DET_RANGE); in gm20b_dvfs_calc_ndiv()
260 *sdm_din = (rem >> BITS_PER_BYTE) & MASK(GPCPLL_CFG2_SDM_DIN_WIDTH); in gm20b_dvfs_calc_ndiv()
537 nvkm_mask(device, GPC_BCAST_GPCPLL_DVFS2, MASK(DFS_DET_RANGE + 1), in gm20b_dvfs_program_ext_cal()
789 data &= MASK(GPCPLL_CFG3_PLL_DFS_TESTOUT_WIDTH); in gm20b_clk_init_dvfs()
[all …]
H A Dgk20a.c72 pll->m = (val >> GPCPLL_COEFF_M_SHIFT) & MASK(GPCPLL_COEFF_M_WIDTH); in gk20a_pllg_read_mnp()
73 pll->n = (val >> GPCPLL_COEFF_N_SHIFT) & MASK(GPCPLL_COEFF_N_WIDTH); in gk20a_pllg_read_mnp()
74 pll->pl = (val >> GPCPLL_COEFF_P_SHIFT) & MASK(GPCPLL_COEFF_P_WIDTH); in gk20a_pllg_read_mnp()
83 val = (pll->m & MASK(GPCPLL_COEFF_M_WIDTH)) << GPCPLL_COEFF_M_SHIFT; in gk20a_pllg_write_mnp()
84 val |= (pll->n & MASK(GPCPLL_COEFF_N_WIDTH)) << GPCPLL_COEFF_N_SHIFT; in gk20a_pllg_write_mnp()
85 val |= (pll->pl & MASK(GPCPLL_COEFF_P_WIDTH)) << GPCPLL_COEFF_P_SHIFT; in gk20a_pllg_write_mnp()
/linux/tools/testing/selftests/ftrace/test.d/ftrace/
H A Dfunc_cpumask.tc29 MASK=0x`cat tracing_cpumask`
30 test `printf "%d" $MASK` -eq 2 || do_reset
/linux/drivers/scsi/
H A Dvmw_pvscsi.h31 #define MASK(n) ((1 << (n)) - 1) /* make an n-bit mask */ macro
410 #define PVSCSI_INTR_CMPL_MASK MASK(2)
414 #define PVSCSI_INTR_MSG_MASK (MASK(2) << 2)
416 #define PVSCSI_INTR_ALL_SUPPORTED MASK(4)
/linux/drivers/tty/
H A Dn_tty.c126 #define MASK(x) ((x) & (N_TTY_BUF_SIZE - 1)) macro
135 return ldata->read_buf[MASK(i)]; in read_buf()
140 return &ldata->read_buf[MASK(i)]; in read_buf_addr()
146 return ldata->echo_buf[MASK(i)]; in echo_buf()
151 return &ldata->echo_buf[MASK(i)]; in echo_buf_addr()
570 if (MASK(ldata->echo_commit) == MASK(*tail + 1)) in n_tty_process_echo_ops()
583 if (MASK(ldata->echo_commit) == MASK(*tail + 2)) in n_tty_process_echo_ops()
686 while (MASK(ldata->echo_commit) != MASK(tail)) { in __process_echoes()
959 while (MASK(ldata->read_head) != MASK(ldata->canon_head)) { in eraser()
967 MASK(head) != MASK(ldata->canon_head)); in eraser()
[all …]
/linux/net/openvswitch/
H A Ddatapath.h338 #define OVS_MASKED(OLD, KEY, MASK) ((KEY) | ((OLD) & ~(MASK))) argument
339 #define OVS_SET_MASKED(OLD, KEY, MASK) ((OLD) = OVS_MASKED(OLD, KEY, MASK)) argument
/linux/drivers/clk/tegra/
H A Dclk-tegra-periph.c130 #define MASK(x) (BIT(x) - 1) macro
135 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \
142 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
149 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
155 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
161 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
168 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
175 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
182 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
189 30, MASK(2), 0, 0, 16, 1, TEGRA_DIVIDER_UART| \
[all …]
/linux/drivers/dma/dw/
H A Dcore.c122 channel_set_bit(dw, MASK.XFER, dwc->mask); in dwc_initialize()
123 channel_set_bit(dw, MASK.ERROR, dwc->mask); in dwc_initialize()
488 channel_set_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_tasklet()
489 channel_set_bit(dw, MASK.ERROR, dw->all_chan_mask); in dw_dma_tasklet()
512 channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_interrupt()
513 channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask); in dw_dma_interrupt()
514 channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask); in dw_dma_interrupt()
523 channel_clear_bit(dw, MASK.XFER, (1 << 8) - 1); in dw_dma_interrupt()
524 channel_clear_bit(dw, MASK.BLOCK, (1 << 8) - 1); in dw_dma_interrupt()
525 channel_clear_bit(dw, MASK.SRC_TRAN, (1 << 8) - 1); in dw_dma_interrupt()
[all …]
/linux/include/video/
H A Dgbe.h81 #define MASK(msb, lsb) \ macro
84 ( ((u32)(v) & MASK(msb,lsb)) >> (lsb) )
86 ( (v) = ((v)&~MASK(msb,lsb)) | (( (u32)(f)<<(lsb) ) & MASK(msb,lsb)) )
/linux/drivers/gpu/drm/i915/
H A Di915_syncmap.c33 #define MASK (KSYNCMAP - 1) macro
111 return (id >> p->height) & MASK; in __sync_branch_idx()
118 return id & MASK; in __sync_leaf_idx()
301 idx = p->prefix >> (above - SHIFT) & MASK; in __sync_set()
/linux/drivers/gpu/drm/amd/display/dc/gpio/
H A Dddc_regs.h41 DDC_GPIO_REG_LIST_ENTRY(MASK, cd, id),\
64 DDC_GPIO_VGA_REG_LIST_ENTRY(MASK, cd),\
81 DDC_GPIO_I2C_REG_LIST_ENTRY(MASK, cd),\
/linux/lib/crypto/riscv/
H A Dsha512-riscv64-zvknhb-zvkb.S58 #define MASK v0 macro
84 vmerge.vvm VTMP, \w2, \w1, MASK
103 vmv.v.i MASK, 0x01
/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Dcursor.c46 MASK(NV_CIO_CRE_HCUR_ASI) | in nv04_cursor_set_offset()
52 MASK(NV_CIO_CRE_HCUR_ADDR1_CUR_DBL); in nv04_cursor_set_offset()
/linux/tools/perf/dlfilters/
H A Ddlfilter-show-cycles.c25 #define MASK (TABLESZ - 1) macro
49 __u32 pos = tid & MASK; in find_entry()
/linux/drivers/dma/
H A Didma64.c41 channel_clear_bit(idma64, MASK(XFER), idma64->all_chan_mask); in idma64_off()
42 channel_clear_bit(idma64, MASK(BLOCK), idma64->all_chan_mask); in idma64_off()
43 channel_clear_bit(idma64, MASK(SRC_TRAN), idma64->all_chan_mask); in idma64_off()
44 channel_clear_bit(idma64, MASK(DST_TRAN), idma64->all_chan_mask); in idma64_off()
45 channel_clear_bit(idma64, MASK(ERROR), idma64->all_chan_mask); in idma64_off()
71 channel_set_bit(idma64, MASK(XFER), idma64c->mask); in idma64_chan_init()
72 channel_set_bit(idma64, MASK(ERROR), idma64c->mask); in idma64_chan_init()

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