Searched refs:phys_spec (Results 1 – 3 of 3) sorted by relevance
1268 pci_alloc_resource(dev_info_t *dip, pci_regspec_t phys_spec) in pci_alloc_resource() argument1281 l = phys_spec.pci_size_low; in pci_alloc_resource()1294 if (assigned[i].pci_phys_hi == phys_spec.pci_phys_hi) { in pci_alloc_resource()1296 phys_spec.pci_size_low) { in pci_alloc_resource()1315 PCI_REG_BDFR_G(phys_spec.pci_phys_hi)) { in pci_alloc_resource()1320 PCI_REG_ADDR_G(phys_spec.pci_phys_hi)) { in pci_alloc_resource()1325 phys_spec.pci_phys_hi); in pci_alloc_resource()1332 phys_spec.pci_size_low); in pci_alloc_resource()1334 phys_spec.pci_size_low = l; in pci_alloc_resource()1348 config.pci_phys_hi = PCI_CONF_ADDR_MASK & phys_spec.pci_phys_hi; in pci_alloc_resource()[all …]
6014 pci_regspec_t phys_spec; in pcicfg_fcode_assign_bars() local6058 phys_spec.pci_phys_hi = hiword; in pcicfg_fcode_assign_bars()6059 phys_spec.pci_phys_mid = 0; in pcicfg_fcode_assign_bars()6060 phys_spec.pci_phys_low = 0; in pcicfg_fcode_assign_bars()6061 phys_spec.pci_size_hi = 0; in pcicfg_fcode_assign_bars()6062 phys_spec.pci_size_low = size; in pcicfg_fcode_assign_bars()6070 if (pcicfg_alloc_resource(dip, phys_spec)) { in pcicfg_fcode_assign_bars()6128 phys_spec.pci_phys_hi = PCICFG_MAKE_REG_HIGH(bus, device, func, \ in pcicfg_fcode_assign_bars()6131 phys_spec.pci_phys_hi |= PCI_REG_PF_M; in pcicfg_fcode_assign_bars()6132 phys_spec.pci_phys_mid = 0; in pcicfg_fcode_assign_bars()[all …]
1898 opl_map_phys(dev_info_t *dip, struct regspec *phys_spec, in opl_map_phys() argument1916 *rspecp = *phys_spec; in opl_map_phys()1924 mapreq.map_obj.rp = (struct regspec *)phys_spec; in opl_map_phys()