1268 pci_alloc_resource(dev_info_t *dip, pci_regspec_t phys_spec)  in pci_alloc_resource()  argument
1281 	l = phys_spec.pci_size_low;  in pci_alloc_resource()
1294 			if (assigned[i].pci_phys_hi == phys_spec.pci_phys_hi) {  in pci_alloc_resource()
1296 				    phys_spec.pci_size_low) {  in pci_alloc_resource()
1315 			    PCI_REG_BDFR_G(phys_spec.pci_phys_hi)) {  in pci_alloc_resource()
1320 				    PCI_REG_ADDR_G(phys_spec.pci_phys_hi)) {  in pci_alloc_resource()
1325 					    phys_spec.pci_phys_hi);  in pci_alloc_resource()
1332 				    phys_spec.pci_size_low);  in pci_alloc_resource()
1334 				phys_spec.pci_size_low = l;  in pci_alloc_resource()
1348 	config.pci_phys_hi = PCI_CONF_ADDR_MASK & phys_spec.pci_phys_hi;  in pci_alloc_resource()
1386 	offset = PCI_REG_REG_G(phys_spec.pci_phys_hi);  in pci_alloc_resource()
1390 	if (PCI_REG_REG_G(phys_spec.pci_phys_hi) == PCI_CONF_ROM) {  in pci_alloc_resource()
1409 		phys_spec.pci_phys_low = LOADDR(answer);  in pci_alloc_resource()
1410 		phys_spec.pci_phys_mid = HIADDR(answer);  in pci_alloc_resource()
1414 		switch (PCI_REG_ADDR_G(phys_spec.pci_phys_hi)) {  in pci_alloc_resource()
1418 			if (phys_spec.pci_phys_hi & PCI_REG_REL_M) {  in pci_alloc_resource()
1425 				    phys_spec.pci_phys_low,  in pci_alloc_resource()
1426 				    phys_spec.pci_phys_mid);  in pci_alloc_resource()
1455 			phys_spec.pci_phys_low = LOADDR(answer);  in pci_alloc_resource()
1456 			phys_spec.pci_phys_mid = HIADDR(answer);  in pci_alloc_resource()
1461 			phys_spec.pci_phys_hi ^= PCI_ADDR_MEM64 ^  in pci_alloc_resource()
1469 			if (phys_spec.pci_phys_hi & PCI_REG_REL_M) {  in pci_alloc_resource()
1476 				    phys_spec.pci_phys_low;  in pci_alloc_resource()
1502 			phys_spec.pci_phys_low = LOADDR(answer);  in pci_alloc_resource()
1508 			if (phys_spec.pci_phys_hi & PCI_REG_REL_M) {  in pci_alloc_resource()
1515 				    phys_spec.pci_phys_low;  in pci_alloc_resource()
1539 			phys_spec.pci_phys_low = LOADDR(answer);  in pci_alloc_resource()
1552 	if (pfc_update_assigned_prop(dip, &phys_spec)) {  in pci_alloc_resource()
1563 pci_free_resource(dev_info_t *dip, pci_regspec_t phys_spec)  in pci_free_resource()  argument
1575 	config.pci_phys_hi = PCI_CONF_ADDR_MASK & phys_spec.pci_phys_hi;  in pci_free_resource()
1608 	offset = PCI_REG_REG_G(phys_spec.pci_phys_hi);  in pci_free_resource()
1616 	l = phys_spec.pci_size_low;  in pci_free_resource()
1618 	if (PCI_REG_REG_G(phys_spec.pci_phys_hi) == PCI_CONF_ROM) {  in pci_free_resource()
1620 		if (ndi_ra_free(ddi_get_parent(dip), phys_spec.pci_phys_low,  in pci_free_resource()
1631 		switch (PCI_REG_ADDR_G(phys_spec.pci_phys_hi)) {  in pci_free_resource()
1635 			    LADDR(phys_spec.pci_phys_low,  in pci_free_resource()
1636 			    phys_spec.pci_phys_mid),  in pci_free_resource()
1648 			    phys_spec.pci_phys_low,  in pci_free_resource()
1659 			    phys_spec.pci_phys_low,  in pci_free_resource()
1678 	    phys_spec.pci_phys_hi);  in pci_free_resource()
1680 	if (pfc_remove_assigned_prop(dip, &phys_spec)) {  in pci_free_resource()
1692 pci_map_phys(dev_info_t *dip, pci_regspec_t *phys_spec,  in pci_map_phys()  argument
1711 	mr.map_obj.rp = (struct regspec *)phys_spec;  in pci_map_phys()