6014 	pci_regspec_t phys_spec;  in pcicfg_fcode_assign_bars()  local
6058 		phys_spec.pci_phys_hi = hiword;  in pcicfg_fcode_assign_bars()
6059 		phys_spec.pci_phys_mid = 0;  in pcicfg_fcode_assign_bars()
6060 		phys_spec.pci_phys_low = 0;  in pcicfg_fcode_assign_bars()
6061 		phys_spec.pci_size_hi = 0;  in pcicfg_fcode_assign_bars()
6062 		phys_spec.pci_size_low = size;  in pcicfg_fcode_assign_bars()
6070 		if (pcicfg_alloc_resource(dip, phys_spec)) {  in pcicfg_fcode_assign_bars()
6128 	phys_spec.pci_phys_hi = PCICFG_MAKE_REG_HIGH(bus, device, func, \  in pcicfg_fcode_assign_bars()
6131 		phys_spec.pci_phys_hi |= PCI_REG_PF_M;  in pcicfg_fcode_assign_bars()
6132 	phys_spec.pci_phys_mid = 0;  in pcicfg_fcode_assign_bars()
6133 	phys_spec.pci_phys_low = PCICFG_LOADDR(mem_answer);  in pcicfg_fcode_assign_bars()
6134 	phys_spec.pci_size_hi = 0;  in pcicfg_fcode_assign_bars()
6135 	phys_spec.pci_size_low = size;  in pcicfg_fcode_assign_bars()
6137 	if (pcicfg_update_assigned_prop(dip, &phys_spec)  in pcicfg_fcode_assign_bars()
6147 	*rom_regspec = phys_spec;  in pcicfg_fcode_assign_bars()
6352 pcicfg_alloc_resource(dev_info_t *dip, pci_regspec_t phys_spec)  in pcicfg_alloc_resource()  argument
6378 			if (assigned[i].pci_phys_hi == phys_spec.pci_phys_hi) {  in pcicfg_alloc_resource()
6390 	config.pci_phys_hi = PCI_CONF_ADDR_MASK & phys_spec.pci_phys_hi;  in pcicfg_alloc_resource()
6413 	request.ra_len = phys_spec.pci_size_low;  in pcicfg_alloc_resource()
6415 	offset = PCI_REG_REG_G(phys_spec.pci_phys_hi);  in pcicfg_alloc_resource()
6419 	if (PCI_REG_REG_G(phys_spec.pci_phys_hi) == PCI_CONF_ROM) {  in pcicfg_alloc_resource()
6442 		phys_spec.pci_phys_low = PCICFG_LOADDR(answer);  in pcicfg_alloc_resource()
6443 		phys_spec.pci_phys_mid = PCICFG_HIADDR(answer);  in pcicfg_alloc_resource()
6446 		switch (PCI_REG_ADDR_G(phys_spec.pci_phys_hi)) {  in pcicfg_alloc_resource()
6473 			phys_spec.pci_phys_low = PCICFG_LOADDR(answer);  in pcicfg_alloc_resource()
6474 			phys_spec.pci_phys_mid = PCICFG_HIADDR(answer);  in pcicfg_alloc_resource()
6479 			phys_spec.pci_phys_hi ^= PCI_ADDR_MEM64 ^  in pcicfg_alloc_resource()
6506 			phys_spec.pci_phys_low = PCICFG_LOADDR(answer);  in pcicfg_alloc_resource()
6528 			phys_spec.pci_phys_low = PCICFG_LOADDR(answer);  in pcicfg_alloc_resource()
6543 	DEBUG1("updating assigned-addresss for %x\n",  phys_spec.pci_phys_hi);  in pcicfg_alloc_resource()
6545 	if (pcicfg_update_assigned_prop(dip, &phys_spec)) {  in pcicfg_alloc_resource()
6556 pcicfg_free_resource(dev_info_t *dip, pci_regspec_t phys_spec,  in pcicfg_free_resource()  argument
6569 	config.pci_phys_hi = PCI_CONF_ADDR_MASK & phys_spec.pci_phys_hi;  in pcicfg_free_resource()
6586 	offset = PCI_REG_REG_G(phys_spec.pci_phys_hi);  in pcicfg_free_resource()
6593 	l = phys_spec.pci_size_low;  in pcicfg_free_resource()
6595 	if (PCI_REG_REG_G(phys_spec.pci_phys_hi) == PCI_CONF_ROM) {  in pcicfg_free_resource()
6598 		if (ndi_ra_free(ddi_get_parent(dip), phys_spec.pci_phys_low,  in pcicfg_free_resource()
6611 		switch (PCI_REG_ADDR_G(phys_spec.pci_phys_hi)) {  in pcicfg_free_resource()
6617 			    PCICFG_LADDR(phys_spec.pci_phys_low,  in pcicfg_free_resource()
6618 			    phys_spec.pci_phys_mid),  in pcicfg_free_resource()
6630 			    phys_spec.pci_phys_low,  in pcicfg_free_resource()
6651 	DEBUG1("updating assigned-addresss for %x\n", phys_spec.pci_phys_hi);  in pcicfg_free_resource()
6653 	if (pcicfg_remove_assigned_prop(dip, &phys_spec)) {  in pcicfg_free_resource()
6734 pcicfg_map_phys(dev_info_t *dip, pci_regspec_t *phys_spec,  in pcicfg_map_phys()  argument
6753 	mr.map_obj.rp = (struct regspec *)phys_spec;  in pcicfg_map_phys()