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Searched refs:zext (Results 1 – 25 of 142) sorted by relevance

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/freebsd/lib/libc/stdio/
H A Dxprintf_int.c262 int l, ngrp, rdx, sign, zext; in __printf_render_int() local
389 zext = pi->prec - (pe - p); in __printf_render_int()
391 zext = 0; in __printf_render_int()
393 zext = pi->width - l; in __printf_render_int()
395 zext = 0; in __printf_render_int()
397 l += zext; in __printf_render_int()
399 while (zext > 0 && p > buf) { in __printf_render_int()
401 zext--; in __printf_render_int()
427 if (zext > 0) in __printf_render_int()
428 ret += __printf_pad(io, zext, 1); in __printf_render_int()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVGISel.td130 def zext_is_sext : PatFrag<(ops node:$src), (zext node:$src), [{
151 def : Pat<(zext (i32 GPR:$src)), (SRLI (i64 (SLLI GPR:$src, 32)), 32)>;
154 def : Pat<(XLenVT (zext (i16 GPR:$src))),
158 def : Pat<(i64 (zext (i16 GPR:$src))),
160 def : Pat<(i32 (zext (i16 GPR:$src))),
180 def : Pat<(zext (i32 GPR:$src)), (ADD_UW GPR:$src, (XLenVT X0))>;
189 def : Pat<(i32 (zext (i16 GPR:$rs))), (ZEXT_H_RV32 GPR:$rs)>;
191 def : Pat<(i64 (zext (i16 GPR:$rs))), (ZEXT_H_RV64 GPR:$rs)>;
192 def : Pat<(i32 (zext (i16 GPR:$rs))), (ZEXT_H_RV64 GPR:$rs)>;
196 def : Pat<(i32 (zext (i16 GPR:$rs))), (PACK GPR:$rs, (XLenVT X0))>;
[all …]
H A DRISCVInstrPredicates.td27 // Returns true if this is the zext.w pattern, adduw rd, rs1, x0.
37 // Returns true if this is the zext.b pattern, andi rd, rs1, 255.
H A DRISCVInstrInfoZc.td173 def C_ZEXT_W : RVZcArith_r<0b11100 , "c.zext.w">,
177 def C_ZEXT_H : RVZcArith_r<0b11010 , "c.zext.h">,
186 def C_ZEXT_B : RVZcArith_r<0b11000 , "c.zext.b">,
H A DRISCVInstrInfoZb.td418 def ZEXT_H_RV32 : RVBUnaryR<0b0000100, 0b100, OPC_OP, "zext.h">,
423 def ZEXT_H_RV64 : RVBUnaryR<0b0000100, 0b100, OPC_OP_32, "zext.h">,
459 def : InstAlias<"zext.w $rd, $rs", (ADD_UW GPR:$rd, GPR:$rs, X0)>;
484 def : InstAlias<"zext.h $rd, $rs", (PACK GPR:$rd, GPR:$rs, X0)>;
488 def : InstAlias<"zext.h $rd, $rs", (PACKW GPR:$rd, GPR:$rs, X0)>;
/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DKnownBits.h161 return KnownBits(Zero.zext(BitWidth), One.zext(BitWidth)); in anyext()
165 KnownBits zext(unsigned BitWidth) const { in zext() function
167 APInt NewZero = Zero.zext(BitWidth); in zext()
169 return KnownBits(NewZero, One.zext(BitWidth)); in zext()
191 return zext(BitWidth); in zextOrTrunc()
/freebsd/contrib/llvm-project/llvm/lib/Support/
H A DAPFixedPoint.cpp260 ThisVal = ThisVal.zext(Wide); in mul()
261 OtherVal = OtherVal.zext(Wide); in mul()
321 ThisVal = ThisVal.zext(Wide); in div()
322 OtherVal = OtherVal.zext(Wide); in div()
375 ThisVal = ThisVal.zext(Wide); in shl()
427 APInt FractPart = Val.zextOrTrunc(Scale).zext(Width); in toString()
428 APInt FractPartMask = APInt::getAllOnes(Scale).zext(Width); in toString()
H A DKnownBits.cpp780 LHS = LHS.zext(BitWidth + 1); in avgComputeU()
781 RHS = RHS.zext(BitWidth + 1); in avgComputeU()
912 KnownBits WideLHS = LHS.zext(2 * BitWidth); in mulhu()
913 KnownBits WideRHS = RHS.zext(2 * BitWidth); in mulhu()
H A DAPInt.cpp384 APInt Result = NewLSB.zext(NewWidth); in concatSlowCase()
654 APInt Val = V.zext(NewLen); in getSplat()
1012 APInt APInt::zext(unsigned width) const { in zext() function in APInt
1035 return zext(width); in zextOrTrunc()
1131 rot = rotateAmt.zext(BitWidth); in rotateModulo()
3134 APInt C1Ext = C1.zext(FullWidth); in mulhu()
3135 APInt C2Ext = C2.zext(FullWidth); in mulhu()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrAtomics.td147 // i64 (zext (i8 (atomic_load_nonext_8))) gets legalized to
153 (i64 (zext (i32 (atomic_load_azext_8 node:$addr))))>;
156 (i64 (zext (i32 (atomic_load_azext_16 node:$addr))))>;
159 (i64 (zext (i32 (atomic_load_nonext_32 node:$addr))))>;
163 // results) and select a zext load; the next instruction will be sext_inreg
375 (zext (i32 (kind node:$addr, (i32 (trunc (i64 node:$val))))))>;
382 // 64-bit) and select a zext RMW; the next instruction will be sext_inreg which
500 (zext (i32 (assertzext (i32 (kind node:$addr,
506 (zext (i32 (kind node:$addr,
512 // zext RMW; the next instruction will be sext_inreg which is selected by
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrExtension.td75 [(set GR32:$dst, (zext GR8:$src))]>, TB,
83 [(set GR32:$dst, (zext GR16:$src))]>, TB,
204 def : Pat<(i64 (zext GR8:$src)),
209 def : Pat<(i64 (zext GR16:$src)),
218 // to these explicit zext instructions.
219 def : Pat<(i64 (zext GR32:$src)),
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCombine.td137 // (shift x, (zext amt)) -> (shift x, (and (anyext amt), mask)
142 (match (G_ZEXT $amt, $amtsrc):$zext,
144 (apply [{ applyCanonicalizeZextShiftAmt(*${shift}, *${zext}); }])>;
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DCmpInstAnalysis.cpp178 Result.Mask = Result.Mask.zext(X->getType()->getScalarSizeInBits()); in decomposeBitTestICmp()
179 Result.C = Result.C.zext(X->getType()->getScalarSizeInBits()); in decomposeBitTestICmp()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTypePromotion.cpp363 APInt NewConst = -((-OverflowConst).zext(64)); in isSafeWrap()
502 NewConst = -((-Const->getValue()).zext(PromotedWidth)); in PromoteTree()
504 NewConst = -((-Const->getValue()).zext(PromotedWidth)); in PromoteTree()
506 NewConst = Const->getValue().zext(PromotedWidth); in PromoteTree()
508 NewConst = Const->getValue().zext(PromotedWidth); in PromoteTree()
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DConstantRange.cpp813 Min = Min.zext(ResultBitWidth); in castOp()
814 Max = Max.zext(ResultBitWidth); in castOp()
848 LowerExt = Lower.zext(DstTySize); in zeroExtend()
853 return ConstantRange(Lower.zext(DstTySize), Upper.zext(DstTySize)); in zeroExtend()
864 return ConstantRange(Lower.sext(DstTySize), Upper.zext(DstTySize)); in signExtend()
1204 APInt this_min = getUnsignedMin().zext(getBitWidth() * 2); in multiply()
1205 APInt this_max = getUnsignedMax().zext(getBitWidth() * 2); in multiply()
1206 APInt Other_min = Other.getUnsignedMin().zext(getBitWidth() * 2); in multiply()
1207 APInt Other_max = Other.getUnsignedMax().zext(getBitWidth() * 2); in multiply()
/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DLoopUnrolling.cpp288 InitNum = InitNum.zext(MaxWidth); in shouldCompletelyUnroll()
289 BoundNum = BoundNum.zext(MaxWidth); in shouldCompletelyUnroll()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonPatterns.td288 def Zext64: PatFrag<(ops node:$Rs), (i64 (zext node:$Rs))>;
291 def azext: PatFrags<(ops node:$Rs), [(zext node:$Rs), (anyext node:$Rs)]>;
842 def: Pat<(i32 (zext (i1 (seteq I32:$Rs, I32:$Rt)))),
844 def: Pat<(i32 (zext (i1 (setne I32:$Rs, I32:$Rt)))),
846 def: Pat<(i32 (zext (i1 (seteq I32:$Rs, anyimm:$s8)))),
848 def: Pat<(i32 (zext (i1 (setne I32:$Rs, anyimm:$s8)))),
2086 def: Pat<(i32 (zext (i1 (seteq (and (shl 1, I32:$Rt), I32:$Rs), 0)))),
2088 def: Pat<(i32 (zext (i1 (setne (and (shl 1, I32:$Rt), I32:$Rs), 0)))),
2090 def: Pat<(i32 (zext (i1 (seteq (and I32:$Rs, IsPow2_32:$u5), 0)))),
2092 def: Pat<(i32 (zext (i1 (setne (and I32:$Rs, IsPow2_32:$u5), 0)))),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrAtomics.td411 def : Pat<(stxr_1 (zext (and GPR32:$val, 0xff)), GPR64sp:$addr),
413 def : Pat<(stxr_2 (zext (and GPR32:$val, 0xffff)), GPR64sp:$addr),
415 def : Pat<(stxr_4 (zext GPR32:$val), GPR64sp:$addr),
465 def : Pat<(stlxr_1 (zext (and GPR32:$val, 0xff)), GPR64sp:$addr),
467 def : Pat<(stlxr_2 (zext (and GPR32:$val, 0xffff)), GPR64sp:$addr),
469 def : Pat<(stlxr_4 (zext GPR32:$val), GPR64sp:$addr),
H A DAArch64InstrGISel.td355 def : PatIgnoreCopies<(i32 (zext (i8 (intOp (v8i8 V64:$Rn))))),
365 def : PatIgnoreCopies<(i32 (zext (i8 (intOp (v16i8 V128:$Rn))))),
376 def : PatIgnoreCopies<(i32 (zext (i16 (intOp (v4i16 V64:$Rn))))),
386 def : PatIgnoreCopies<(i32 (zext (i16 (intOp (v8i16 V128:$Rn))))),
/freebsd/contrib/llvm-project/clang/lib/AST/ByteCode/
H A DIntegralAP.h53 Extended = V.zext(BitSize); in truncateCast()
151 return APSInt(getValue().zext(Bits), !Signed);
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrData.td670 // i16 <- zext i8
671 def: Pat<(i16 (zext i8:$src)),
681 // i32 <- zext i8
682 def: Pat<(i32 (zext i8:$src)), (MOVZXd32d8 MxDRD8:$src)>;
688 // i32 <- zext i16
689 def: Pat<(i32 (zext i16:$src)), (MOVZXd32d16 MxDRD16:$src)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/Disassembler/
H A DM68kDisassembler.cpp159 Insn = Insn.zext(RoundUp); in getInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXInstrInfo.td928 def : Pat<(shl (zext i32:$a), (i32 IntConst_0_30:$b)),
933 def : Pat<(shl (zext i16:$a), (i16 IntConst_0_14:$b)),
942 def : Pat<(mul (zext i32:$a), (zext i32:$b)),
944 def : Pat<(mul (zext i32:$a), (i64 UInt32Const:$b)),
952 def : Pat<(mul (zext i16:$a), (zext i16:$b)),
954 def : Pat<(mul (zext i16:$a), (i32 UInt16Const:$b)),
1484 const APInt R = BSext.concat(BSext).concat(BSext).concat(B).zext(32);
2189 // zext i1
2190 def : Pat<(i16 (zext i1:$a)), (SELP_b16ii 1, 0, $a)>;
2191 def : Pat<(i32 (zext i1:$a)), (SELP_b32ii 1, 0, $a)>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFunctionLoweringInfo.cpp482 Val = CI->getValue().zext(BitWidth); in ComputePHILiveOutRegInfo()
518 Val = CI->getValue().zext(BitWidth); in ComputePHILiveOutRegInfo()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLowerExpectIntrinsic.cpp180 Result = Result.zext(Op->getType()->getIntegerBitWidth()); in handlePhiDef()

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