Searched refs:vsr (Results 1 – 13 of 13) sorted by relevance
| /freebsd/sys/powerpc/powerpc/ |
| H A D | ptrace_machdep.c | 48 uint64_t vsr[32]; in cpu_ptrace() local 55 bzero(vsr, sizeof(vsr)); in cpu_ptrace() 90 for (vsr_idx = 0; vsr_idx < nitems(vsr); vsr_idx++) { in cpu_ptrace() 91 vsr_dw1 = (uint64_t *)&pcb->pcb_fpu.fpr[vsr_idx].vsr[2]; in cpu_ptrace() 92 vsr[vsr_idx] = *vsr_dw1; in cpu_ptrace() 95 error = copyout(&vsr, addr, sizeof(vsr)); in cpu_ptrace() 100 error = copyin(addr, &vsr, sizeof(vsr)); in cpu_ptrace() 109 for (vsr_idx = 0; vsr_idx < nitems(vsr); vsr_idx++) { in cpu_ptrace() 110 vsr_dw1 = (uint64_t *)&pcb->pcb_fpu.fpr[vsr_idx].vsr[2]; in cpu_ptrace() 111 *vsr_dw1 = vsr[vsr_idx]; in cpu_ptrace()
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| H A D | elf32_machdep.c | 212 vsr_dw1 = (uint64_t *)&pcb->pcb_fpu.fpr[vsr_idx].vsr[2]; in elf32_dump_thread()
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| H A D | elf64_machdep.c | 303 vsr_dw1 = (uint64_t *)&pcb->pcb_fpu.fpr[vsr_idx].vsr[2]; in elf64_dump_thread()
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| H A D | exec_machdep.c | 431 &pcb->pcb_fpu.fpr[i].vsr[2], sizeof(double)); in grab_mcontext() 556 memcpy(&pcb->pcb_fpu.fpr[i].vsr[2], in set_mcontext()
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| /freebsd/contrib/bearssl/src/hash/ |
| H A D | ghash_pwr8.c | 91 vsr(TT0, TT0, HB7) \ 101 vsr(TT0, x1, HB1) \ 102 vsr(TT1, x1, HB2) \ 103 vsr(TT2, x1, HB7) \ 111 vsr(TT0, x1, HB1) \ 112 vsr(TT1, x1, HB2) \ 113 vsr(TT2, x1, HB7) \
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| /freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
| H A D | bcm59056.dtsi | 67 vsr_reg: vsr {
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| /freebsd/sys/powerpc/include/ |
| H A D | pcb.h | 69 uint32_t vsr[4]; member
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | brcm,bcm59056.txt | 22 csr, iosr1, iosr2, msr, sdsr1, sdsr2, vsr,
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| /freebsd/crypto/openssl/crypto/perlasm/ |
| H A D | ppc-xlate.pl | 202 my $vsr = sub { vsr2vr("vsr", 3, @_); };
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| /freebsd/contrib/bearssl/src/ |
| H A D | inner.h | 2403 #define vsr(vrt, vra, vrb) vsr_(vrt, vra, vrb) macro
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrMMA.td | 539 // On Future CPU the wacc registers no longer overlap with the vsr registers 540 // and so register allocation would have to know to match 4 vsr registers
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| H A D | PPCInstrAltivec.td | 723 def VSR : VX1_Int_Ty< 708, "vsr" , int_ppc_altivec_vsr, v4i32>;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsPowerPC.td | 1196 def int_ppc_altivec_vsr : PowerPC_Vec_WWW_Intrinsic<"vsr">;
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