1f9bac91bSBenno Rice /*- 251369649SPedro F. Giffuni * SPDX-License-Identifier: BSD-4-Clause 351369649SPedro F. Giffuni * 4f9bac91bSBenno Rice * Copyright (C) 1995, 1996 Wolfgang Solfrank. 5f9bac91bSBenno Rice * Copyright (C) 1995, 1996 TooLs GmbH. 6f9bac91bSBenno Rice * All rights reserved. 7f9bac91bSBenno Rice * 8f9bac91bSBenno Rice * Redistribution and use in source and binary forms, with or without 9f9bac91bSBenno Rice * modification, are permitted provided that the following conditions 10f9bac91bSBenno Rice * are met: 11f9bac91bSBenno Rice * 1. Redistributions of source code must retain the above copyright 12f9bac91bSBenno Rice * notice, this list of conditions and the following disclaimer. 13f9bac91bSBenno Rice * 2. Redistributions in binary form must reproduce the above copyright 14f9bac91bSBenno Rice * notice, this list of conditions and the following disclaimer in the 15f9bac91bSBenno Rice * documentation and/or other materials provided with the distribution. 16f9bac91bSBenno Rice * 3. All advertising materials mentioning features or use of this software 17f9bac91bSBenno Rice * must display the following acknowledgement: 18f9bac91bSBenno Rice * This product includes software developed by TooLs GmbH. 19f9bac91bSBenno Rice * 4. The name of TooLs GmbH may not be used to endorse or promote products 20f9bac91bSBenno Rice * derived from this software without specific prior written permission. 21f9bac91bSBenno Rice * 22f9bac91bSBenno Rice * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 23f9bac91bSBenno Rice * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24f9bac91bSBenno Rice * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25f9bac91bSBenno Rice * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26f9bac91bSBenno Rice * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27f9bac91bSBenno Rice * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28f9bac91bSBenno Rice * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29f9bac91bSBenno Rice * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30f9bac91bSBenno Rice * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31f9bac91bSBenno Rice * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32f9bac91bSBenno Rice * 33f9bac91bSBenno Rice * $NetBSD: pcb.h,v 1.4 2000/06/04 11:57:17 tsubai Exp $ 34f9bac91bSBenno Rice */ 35f9bac91bSBenno Rice 36f9bac91bSBenno Rice #ifndef _MACHINE_PCB_H_ 37f9bac91bSBenno Rice #define _MACHINE_PCB_H_ 38f9bac91bSBenno Rice 393de50be8SBrandon Bergren #include <sys/endian.h> 403de50be8SBrandon Bergren 41a18c313eSNathan Whitehorn #include <machine/setjmp.h> 42f9bac91bSBenno Rice 43ef1fcaf0SWarner Losh #ifndef _STANDALONE 44f9bac91bSBenno Rice struct pcb { 45e07530d2SLeandro Lupori register_t pcb_context[20]; /* non-volatile r12-r31 */ 464eed0cf1SBenno Rice register_t pcb_cr; /* Condition register */ 474eed0cf1SBenno Rice register_t pcb_sp; /* stack pointer */ 48c3e289e1SNathan Whitehorn register_t pcb_toc; /* toc pointer */ 494eed0cf1SBenno Rice register_t pcb_lr; /* link register */ 502914706aSJustin Hibbits register_t pcb_dscr; /* dscr value */ 518b7f0d83SJustin Hibbits register_t pcb_fscr; 52d1d73b0eSJustin Hibbits register_t pcb_tar; 53f9bac91bSBenno Rice struct pmap *pcb_pm; /* pmap of our vmspace */ 54a18c313eSNathan Whitehorn jmp_buf *pcb_onfault; /* For use during 554eed0cf1SBenno Rice copyin/copyout */ 56f9bac91bSBenno Rice int pcb_flags; 572914706aSJustin Hibbits #define PCB_FPU 0x1 /* Process uses FPU */ 582914706aSJustin Hibbits #define PCB_FPREGS 0x2 /* Process had FPU registers initialized */ 59*a6662c37SShawn Anastasio #define PCB_VEC 0x4 /* Process uses Altivec */ 602914706aSJustin Hibbits #define PCB_VSX 0x8 /* Process had VSX initialized */ 612914706aSJustin Hibbits #define PCB_CDSCR 0x10 /* Process had Custom DSCR initialized */ 6203e83a83SBreno Leitao #define PCB_HTM 0x20 /* Process had HTM initialized */ 638b7f0d83SJustin Hibbits #define PCB_CFSCR 0x40 /* Process had FSCR updated */ 64*a6662c37SShawn Anastasio #define PCB_KERN_FPU 0x80 /* Kernel is using FPU/Vector unit */ 65*a6662c37SShawn Anastasio #define PCB_KERN_FPU_NOSAVE 0x100 /* FPU/Vec state not saved for kernel use */ 66*a6662c37SShawn Anastasio #define PCB_VECREGS 0x200 /* Process had Altivec registers initialized */ 67f9bac91bSBenno Rice struct fpu { 6835f612b8SNathan Whitehorn union { 693de50be8SBrandon Bergren #if _BYTE_ORDER == _BIG_ENDIAN 7035f612b8SNathan Whitehorn double fpr; 7135f612b8SNathan Whitehorn uint32_t vsr[4]; 723de50be8SBrandon Bergren #else 733de50be8SBrandon Bergren uint32_t vsr[4]; 743de50be8SBrandon Bergren struct { 753de50be8SBrandon Bergren double padding; 763de50be8SBrandon Bergren double fpr; 773de50be8SBrandon Bergren }; 783de50be8SBrandon Bergren #endif 7935f612b8SNathan Whitehorn } fpr[32]; 80f9bac91bSBenno Rice double fpscr; /* FPSCR stored as double for easier access */ 81f9bac91bSBenno Rice } pcb_fpu; /* Floating point processor */ 82eeaa8979SBenno Rice unsigned int pcb_fpcpu; /* which CPU had our FPU 83eeaa8979SBenno Rice stuff. */ 841ac37bcbSNathan Whitehorn struct vec { 851ac37bcbSNathan Whitehorn uint32_t vr[32][4]; 86971e8cb1SJustin Hibbits uint32_t spare[2]; 87971e8cb1SJustin Hibbits uint32_t vrsave; 88971e8cb1SJustin Hibbits uint32_t vscr; /* aligned at vector element 3 */ 89c3e289e1SNathan Whitehorn } pcb_vec __aligned(16); /* Vector processor */ 901ac37bcbSNathan Whitehorn unsigned int pcb_veccpu; /* which CPU had our vector 911ac37bcbSNathan Whitehorn stuff. */ 9203e83a83SBreno Leitao struct htm { 9303e83a83SBreno Leitao uint64_t tfhar; 9403e83a83SBreno Leitao uint64_t texasr; 9503e83a83SBreno Leitao uint64_t tfiar; 9603e83a83SBreno Leitao } pcb_htm; 97786e4a1bSRafal Jaworowski 98d1d73b0eSJustin Hibbits struct ebb { 99d1d73b0eSJustin Hibbits uint64_t ebbhr; 100d1d73b0eSJustin Hibbits uint64_t ebbrr; 101d1d73b0eSJustin Hibbits uint64_t bescr; 102d1d73b0eSJustin Hibbits } pcb_ebb; 103d1d73b0eSJustin Hibbits 104d1d73b0eSJustin Hibbits struct lmon { 105d1d73b0eSJustin Hibbits uint64_t lmrr; 106d1d73b0eSJustin Hibbits uint64_t lmser; 107d1d73b0eSJustin Hibbits } pcb_lm; 108d1d73b0eSJustin Hibbits 109786e4a1bSRafal Jaworowski union { 110786e4a1bSRafal Jaworowski struct { 11195fa3335SNathan Whitehorn vm_offset_t usr_segm; /* Base address */ 112c3e289e1SNathan Whitehorn register_t usr_vsid; /* USER_SR segment */ 113786e4a1bSRafal Jaworowski } aim; 114786e4a1bSRafal Jaworowski struct { 1150a35b40fSRafal Jaworowski register_t dbcr0; 116786e4a1bSRafal Jaworowski } booke; 117786e4a1bSRafal Jaworowski } pcb_cpu; 118fe5e88faSJustin Hibbits vm_offset_t pcb_lastill; /* Last illegal instruction */ 119f9bac91bSBenno Rice }; 120ef1fcaf0SWarner Losh #endif 121f9bac91bSBenno Rice 122f9bac91bSBenno Rice #ifdef _KERNEL 123f9bac91bSBenno Rice 124f54721f6SMarcel Moolenaar struct trapframe; 125f54721f6SMarcel Moolenaar 126f9bac91bSBenno Rice #ifndef curpcb 127f9bac91bSBenno Rice extern struct pcb *curpcb; 128f9bac91bSBenno Rice #endif 129f9bac91bSBenno Rice 130f9bac91bSBenno Rice extern struct pmap *curpm; 131f9bac91bSBenno Rice extern struct proc *fpuproc; 132f9bac91bSBenno Rice 133abdc8ff1SPeter Grehan void makectx(struct trapframe *, struct pcb *); 1342383d92aSNathan Whitehorn void savectx(struct pcb *) __returns_twice; 135abdc8ff1SPeter Grehan 136f9bac91bSBenno Rice #endif 137f9bac91bSBenno Rice #endif /* _MACHINE_PCB_H_ */ 138