powerpc: Implement fpu_kern_enter/fpu_kern_leave

Summary:
Provide an implementation of fpu_kern_enter/fpu_kern_leave for PPC to
enable FPU, VSX, and Altivec usage in-kernel. The functions currently

powerpc: Implement fpu_kern_enter/fpu_kern_leave

Summary:
Provide an implementation of fpu_kern_enter/fpu_kern_leave for PPC to
enable FPU, VSX, and Altivec usage in-kernel. The functions currently
only support FPU_KERN_NOCTX, but this is sufficient for ossl(1) and many
other users of the API.

This patchset has been tested on powerpc64le using a modified version of
the in-tree tools/tools/crypto/cryptocheck.c tool to check for FPU/Vec
register clobbering along with a follow-up patch to enable ossl(4) on
powerpc64*.

Reviewed by: jhibbits
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D41540

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Revert "powerpc: Implement fpu_kern_enter/fpu_kern_leave"

This reverts commit 6a47fa697ace42851b44498a53446b29b2593316.

Need to correct authorship.

powerpc: Implement fpu_kern_enter/fpu_kern_leave

Summary:
Provide an implementation of fpu_kern_enter/fpu_kern_leave for PPC to
enable FPU, VSX, and Altivec usage in-kernel. The functions currently

powerpc: Implement fpu_kern_enter/fpu_kern_leave

Summary:
Provide an implementation of fpu_kern_enter/fpu_kern_leave for PPC to
enable FPU, VSX, and Altivec usage in-kernel. The functions currently
only support FPU_KERN_NOCTX, but this is sufficient for ossl(1) and many
other users of the API.

This patchset has been tested on powerpc64le using a modified version of
the in-tree tools/tools/crypto/cryptocheck.c tool to check for FPU/Vec
register clobbering along with a follow-up patch to enable ossl(4) on
powerpc64*.

Reviewed by: jhibbits
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D41540

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sys: Remove $FreeBSD$: one-line .h pattern

Remove /^\s*\*+\s*\$FreeBSD\$.*$\n/

[PowerPC64LE] Fix LE VSX/fpr interop

In the PCB struct, we need to match the VSX register file layout
correctly, as the VSRs shadow the FPRs.

In LE, we need to have a dword of padding before the fp

[PowerPC64LE] Fix LE VSX/fpr interop

In the PCB struct, we need to match the VSX register file layout
correctly, as the VSRs shadow the FPRs.

In LE, we need to have a dword of padding before the fprs so they end up
on the correct side, as the struct may be manipulated by either the FP
routines or the VSX routines.

Additionally, when saving and restoring fprs, we need to explicitly target
the fpr union member so it gets offset correctly on LE.

Fixes weirdness with FP registers in VSX-using programs (A FPR that was
saved by the FP routines but restored by the VSX routines was becoming 0
due to being loaded to the wrong side of the VSR.)

Original patch by jhibbits.

Reviewed by: jhibbits
Differential Revision: https://reviews.freebsd.org/D27431

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powerpc: clean up empty lines in .c and .h files

[PPC] Fix wrong comment

pcb_context[20] holds r12-r31 and not r14-r31, as the comment said.

MFHead @347527

Sponsored by: The FreeBSD Foundation

powerpc: Add support for additional FSCR-managed facilities

Add support to enable, save, and restore the following facilities:
* Target Address Register (bctar) -- seemingly just another register to

powerpc: Add support for additional FSCR-managed facilities

Add support to enable, save, and restore the following facilities:
* Target Address Register (bctar) -- seemingly just another register to
branch to.
* Event-based branching -- an interrupt-like userspace event handler
subsystem.
* Load-monitored facility -- A facility that allows monitoring a range of
physical memory, and triggering an event on access. Targeted to garbage
collection software features.

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powerpc64: Add the DSCR facility on POWER8 and later

The Data Stream Control Register (DSCR) is privileged on POWER7, but
unprivileged (different register) on POWER8 and later. However, it's now
gu

powerpc64: Add the DSCR facility on POWER8 and later

The Data Stream Control Register (DSCR) is privileged on POWER7, but
unprivileged (different register) on POWER8 and later. However, it's now
guarded by a new register, the Facility Status and Control Register, instead of
the MSR like other pre-existing facilities (FPU, Altivec). The FSCR must be
managed explicitly, since it's effectively an extension of the MSR.

Tested by: Brandon Bergren

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Merge ^/head r340427 through r340868.

powerpc: Sync icache on SIGILL, in case of cache issues

The update of jemalloc to 5.1.0 exposed a cache syncing issue on a Freescale
e500 base system. There was already code in the FPU emulator to

powerpc: Sync icache on SIGILL, in case of cache issues

The update of jemalloc to 5.1.0 exposed a cache syncing issue on a Freescale
e500 base system. There was already code in the FPU emulator to address
this, but it was limited to a single static variable, and did not attempt to
sync the cache. This pulls that out to the higher level program exception
handler, and syncs the cache.

If a SIGILL is hit a second time at the same address, it will be treated as
a real illegal instruction, and handled accordingly.

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Merge ^/head r338392 through r338594.

powerpc64: Add initial support for HTM (kABI)

This patch adds the very initial support for HTM that might come at FreeBSD
version 12.1. This basic support defines a new kABI, so, we do not need to c

powerpc64: Add initial support for HTM (kABI)

This patch adds the very initial support for HTM that might come at FreeBSD
version 12.1. This basic support defines a new kABI, so, we do not need to change
it later during 12.1 time frame, when the full implementation will come.

Reviewed by: jhibbits
Approved by: re(marius), jhibbits (mentor)
Differential Revision: https://reviews.freebsd.org/D16889

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powerpc64: Add DSCR support

Summary:
Powerpc64 has support for a register called Data Stream Control Register
(DSCR), which basically controls how the hardware controls the caching and
prefetch for

powerpc64: Add DSCR support

Summary:
Powerpc64 has support for a register called Data Stream Control Register
(DSCR), which basically controls how the hardware controls the caching and
prefetch for stream operations.

Since mfdscr and mtdscr are privileged instructions, we need to emulate them,
and
keep the custom DSCR configuration per thread.

The purpose of this feature is to change DSCR depending on the operation, set
to DSCR Default Prefetch Depth to deepest on string operations, as memcpy.

Submitted by: Breno Leitao
Differential Revision: https://reviews.freebsd.org/D15081

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Do not include float interfaces when using libsa.

We don't support float in the boot loaders, so don't include
interfaces for float or double in systems headers. In addition, take
the unusual step o

Do not include float interfaces when using libsa.

We don't support float in the boot loaders, so don't include
interfaces for float or double in systems headers. In addition, take
the unusual step of spiking double and float to prevent any more
accidental seepage.

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Merge ^/head r325999 through r326131.

sys: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 3-Clause license.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for

sys: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 3-Clause license.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.

Special thanks to Wind River for providing access to "The Duke of
Highlander" tool: an older (2014) run over FreeBSD tree was useful as a
starting point.

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MFH @r294567

MFH

Sponsored by: The FreeBSD Foundation

Merge ^/head r293430 through r293685.

Use setjmp() instead of the identical-except-for-having-a-wrong-prototype
setfault() when testing for faults. This should also help the compiler
do the right thing with this complicated-to-optimize f

Use setjmp() instead of the identical-except-for-having-a-wrong-prototype
setfault() when testing for faults. This should also help the compiler
do the right thing with this complicated-to-optimize function.

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Merge sync of head

MFH: r278968-r280640

Sponsored by: The FreeBSD Foundation

Merge from head